| Line 5... |
Line 5... |
\@nameuse{es@quoting}
|
\@nameuse{es@quoting}
|
\select@language{spanish}
|
\select@language{spanish}
|
\@writefile{toc}{\select@language{spanish}}
|
\@writefile{toc}{\select@language{spanish}}
|
\@writefile{lof}{\select@language{spanish}}
|
\@writefile{lof}{\select@language{spanish}}
|
\@writefile{lot}{\select@language{spanish}}
|
\@writefile{lot}{\select@language{spanish}}
|
\@writefile{toc}{\contentsline {section}{\numberline {1}Hardware}{1}}
|
\@writefile{toc}{\contentsline {section}{\numberline {1}Hardware}{2}}
|
\newlabel{chap:hw}{{1}{1}}
|
\newlabel{chap:hw}{{1}{2}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces Proceso de dise\IeC {\~n}o de las placas\relax }}{2}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces Proceso de dise\IeC {\~n}o de las placas\relax }}{2}}
|
\providecommand*\caption@xref[2]{\@setref\relax\@undefined{#1}}
|
\providecommand*\caption@xref[2]{\@setref\relax\@undefined{#1}}
|
\newlabel{fig:hw-ciclo}{{1}{2}}
|
\newlabel{fig:hw-ciclo}{{1}{2}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.1}Plataforma de Hardware Reconfigurable (PHR)}{2}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.1}Plataforma de Hardware Reconfigurable (PHR)}{3}}
|
\newlabel{sec:phr}{{1.1}{2}}
|
\newlabel{sec:phr}{{1.1}{3}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.1.1}Recursos de \textsl {hardware}}{3}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.1.1}Recursos de \textsl {hardware}}{3}}
|
\newlabel{sec:phr-recursos-hw}{{1.1.1}{3}}
|
\newlabel{sec:phr-recursos-hw}{{1.1.1}{3}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.1.2}Esquem\IeC {\'a}tico}{3}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.1.2}Esquem\IeC {\'a}tico}{4}}
|
\newlabel{sec:phr-dia-electrico}{{1.1.2}{3}}
|
\newlabel{sec:phr-dia-electrico}{{1.1.2}{4}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.1.3}\textsl {Printed Circuit Board} (PCB)}{3}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.1.3}\textsl {Printed Circuit Board} (PCB)}{4}}
|
\newlabel{sec:phr-pcb}{{1.1.3}{3}}
|
\newlabel{sec:phr-pcb}{{1.1.3}{4}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces Esquem\IeC {\'a}tico TOP de la placa \emph {PHR}.\relax }}{4}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces Esquem\IeC {\'a}tico TOP de la placa \emph {PHR}.\relax }}{5}}
|
\newlabel{fig:phr-sch-top}{{2}{4}}
|
\newlabel{fig:phr-sch-top}{{2}{5}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {3}{\ignorespaces Bloque interno al diagrama TOP, denominado ``power'' debido a que contiene la conexi\IeC {\'o}n con la placa \emph {S3power} y capacitores que evitan interferencias el\IeC {\'e}ctricas.\relax }}{5}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {3}{\ignorespaces Bloque interno al diagrama TOP, denominado ``power'' debido a que contiene la conexi\IeC {\'o}n con la placa \emph {S3power} y capacitores que evitan interferencias el\IeC {\'e}ctricas.\relax }}{6}}
|
\newlabel{fig:phr-sch-power}{{3}{5}}
|
\newlabel{fig:phr-sch-power}{{3}{6}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {4}{\ignorespaces Bloque con todos los perif\IeC {\'e}ricos. Aqu\IeC {\'\i } se observa la ventaja del dise\IeC {\~n}o jerarquizado, pues si se tendr\IeC {\'\i }an todos estos componentes junto a los de la Figura \ref {fig:phr-sch-top} y \ref {fig:phr-sch-power}, presentar\IeC {\'\i }a inconvenientes para su entendimiento.\relax }}{6}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {4}{\ignorespaces Bloque con todos los perif\IeC {\'e}ricos. Aqu\IeC {\'\i } se observa la ventaja del dise\IeC {\~n}o jerarquizado, pues si se tendr\IeC {\'\i }an todos estos componentes junto a los de la Figura \ref {fig:phr-sch-top} y \ref {fig:phr-sch-power}, presentar\IeC {\'\i }a inconvenientes para su entendimiento.\relax }}{7}}
|
\newlabel{fig:phr-sch-ioports}{{4}{6}}
|
\newlabel{fig:phr-sch-ioports}{{4}{7}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {5}{\ignorespaces Distribuci\IeC {\'o}n de los componentes en la placa.\relax }}{7}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {5}{\ignorespaces Distribuci\IeC {\'o}n de los componentes en la placa.\relax }}{8}}
|
\newlabel{fig:phr-pcb-pcbnew-top}{{5}{7}}
|
\newlabel{fig:phr-pcb-pcbnew-top}{{5}{8}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {6}{\ignorespaces Modelo en 3D de la placa \emph {PHR} (Perspectiva 1).\relax }}{7}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {6}{\ignorespaces Modelo en 3D de la placa \emph {PHR} (Perspectiva 1).\relax }}{8}}
|
\newlabel{fig:phr-pcb-3d-1}{{6}{7}}
|
\newlabel{fig:phr-pcb-3d-1}{{6}{8}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {7}{\ignorespaces Modelo en 3D de la placa \emph {PHR} (Perspectiva 2).\relax }}{8}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {7}{\ignorespaces Modelo en 3D de la placa \emph {PHR} (Perspectiva 2).\relax }}{9}}
|
\newlabel{fig:phr-pcb-3d-2}{{7}{8}}
|
\newlabel{fig:phr-pcb-3d-2}{{7}{9}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {8}{\ignorespaces Fotograf\IeC {\'\i }a de la placa \emph {PHR} (Perspectiva 1).\relax }}{8}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {8}{\ignorespaces Fotograf\IeC {\'\i }a de la placa \emph {PHR} (Perspectiva 1).\relax }}{9}}
|
\newlabel{fig:phr-pcb-foto-1}{{8}{8}}
|
\newlabel{fig:phr-pcb-foto-1}{{8}{9}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces Fotograf\IeC {\'\i }a de la placa \emph {PHR} (Perspectiva 2).\relax }}{9}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces Fotograf\IeC {\'\i }a de la placa \emph {PHR} (Perspectiva 2).\relax }}{10}}
|
\newlabel{fig:phr-pcb-foto-2}{{9}{9}}
|
\newlabel{fig:phr-pcb-foto-2}{{9}{10}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.2}S3Power}{10}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.2}S3Power}{11}}
|
\newlabel{sec:s3power}{{1.2}{10}}
|
\newlabel{sec:s3power}{{1.2}{11}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.2.1}Esquem\IeC {\'a}tico y PCB}{10}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.2.1}Esquem\IeC {\'a}tico y PCB}{11}}
|
\newlabel{sec:s3power-sch-pcb}{{1.2.1}{10}}
|
\newlabel{sec:s3power-sch-pcb}{{1.2.1}{11}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {10}{\ignorespaces Esquem\IeC {\'a}tico de la placa \emph {S3Power}.\relax }}{10}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {10}{\ignorespaces Esquem\IeC {\'a}tico de la placa \emph {S3Power}.\relax }}{11}}
|
\newlabel{fig:s3power-sch}{{10}{10}}
|
\newlabel{fig:s3power-sch}{{10}{11}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {11}{\ignorespaces Distribuci\IeC {\'o}n de los componentes en la placa.\relax }}{11}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {11}{\ignorespaces Distribuci\IeC {\'o}n de los componentes en la placa.\relax }}{12}}
|
\newlabel{fig:s3power-pcb-layers}{{11}{11}}
|
\newlabel{fig:s3power-pcb-layers}{{11}{12}}
|
\newlabel{fig:s3power-pcb-3d-1}{{12a}{11}}
|
\newlabel{fig:s3power-pcb-3d-1}{{12a}{12}}
|
\newlabel{sub@fig:s3power-pcb-3d-1}{{a}{11}}
|
\newlabel{sub@fig:s3power-pcb-3d-1}{{a}{12}}
|
\newlabel{fig:s3power-pcb-3d-2}{{12b}{11}}
|
\newlabel{fig:s3power-pcb-3d-2}{{12b}{12}}
|
\newlabel{sub@fig:s3power-pcb-3d-2}{{b}{11}}
|
\newlabel{sub@fig:s3power-pcb-3d-2}{{b}{12}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {12}{\ignorespaces Modelo en 3D de la placa \emph {S3Power}.\relax }}{11}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {12}{\ignorespaces Modelo en 3D de la placa \emph {S3Power}.\relax }}{12}}
|
\newlabel{fig:s3power-pcb-3d}{{12}{11}}
|
\newlabel{fig:s3power-pcb-3d}{{12}{12}}
|
\newlabel{fig:s3power-foto-1}{{13a}{11}}
|
\newlabel{fig:s3power-foto-1}{{13a}{12}}
|
\newlabel{sub@fig:s3power-foto-1}{{a}{11}}
|
\newlabel{sub@fig:s3power-foto-1}{{a}{12}}
|
\newlabel{fig:s3power-foto-2}{{13b}{11}}
|
\newlabel{fig:s3power-foto-2}{{13b}{12}}
|
\newlabel{sub@fig:s3power-foto-2}{{b}{11}}
|
\newlabel{sub@fig:s3power-foto-2}{{b}{12}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {13}{\ignorespaces Fotograf\IeC {\'\i }as de la placa \emph {S3Power}.\relax }}{11}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {13}{\ignorespaces Fotograf\IeC {\'\i }as de la placa \emph {S3Power}.\relax }}{12}}
|
\newlabel{fig:s3power-foto}{{13}{11}}
|
\newlabel{fig:s3power-foto}{{13}{12}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.3}OOCDLink}{12}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.3}OOCDLink}{13}}
|
\newlabel{sec:oocdlink}{{1.3}{12}}
|
\newlabel{sec:oocdlink}{{1.3}{13}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.3.1}Esquem\IeC {\'a}tico y PCB}{12}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.3.1}Esquem\IeC {\'a}tico y PCB}{13}}
|
\newlabel{sec:oocdlink-sch-pcb}{{1.3.1}{12}}
|
\newlabel{sec:oocdlink-sch-pcb}{{1.3.1}{13}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {14}{\ignorespaces Esquem\IeC {\'a}tico de la placa \emph {OOCDLink}.\relax }}{12}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {14}{\ignorespaces Esquem\IeC {\'a}tico de la placa \emph {OOCDLink}.\relax }}{13}}
|
\newlabel{fig:oocdlink-sch}{{14}{12}}
|
\newlabel{fig:oocdlink-sch}{{14}{13}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {15}{\ignorespaces Distribuci\IeC {\'o}n de los componentes en la placa \emph {OOCDLink}.\relax }}{13}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {15}{\ignorespaces Distribuci\IeC {\'o}n de los componentes en la placa \emph {OOCDLink}.\relax }}{14}}
|
\newlabel{fig:oocdlik-pcb-layers}{{15}{13}}
|
\newlabel{fig:oocdlik-pcb-layers}{{15}{14}}
|
\newlabel{fig:oocdlink-pcb-3d-1}{{16a}{13}}
|
\newlabel{fig:oocdlink-pcb-3d-1}{{16a}{14}}
|
\newlabel{sub@fig:oocdlink-pcb-3d-1}{{a}{13}}
|
\newlabel{sub@fig:oocdlink-pcb-3d-1}{{a}{14}}
|
\newlabel{fig:oocdlink-pcb-3d-2}{{16b}{13}}
|
\newlabel{fig:oocdlink-pcb-3d-2}{{16b}{14}}
|
\newlabel{sub@fig:oocdlink-pcb-3d-2}{{b}{13}}
|
\newlabel{sub@fig:oocdlink-pcb-3d-2}{{b}{14}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {16}{\ignorespaces Modelo en 3D de la placa \emph {OOCDLink}.\relax }}{13}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {16}{\ignorespaces Modelo en 3D de la placa \emph {OOCDLink}.\relax }}{14}}
|
\newlabel{fig:oocdlink-pcb-3d}{{16}{13}}
|
\newlabel{fig:oocdlink-pcb-3d}{{16}{14}}
|
\newlabel{fig:oocdlink-foto-1}{{17a}{13}}
|
\newlabel{fig:oocdlink-foto-1}{{17a}{14}}
|
\newlabel{sub@fig:oocdlink-foto-1}{{a}{13}}
|
\newlabel{sub@fig:oocdlink-foto-1}{{a}{14}}
|
\newlabel{fig:oocdlink-foto-2}{{17b}{13}}
|
\newlabel{fig:oocdlink-foto-2}{{17b}{14}}
|
\newlabel{sub@fig:oocdlink-foto-2}{{b}{13}}
|
\newlabel{sub@fig:oocdlink-foto-2}{{b}{14}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {17}{\ignorespaces Fotograf\IeC {\'\i }as de la placa \emph {OOCDLink}.\relax }}{13}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {17}{\ignorespaces Fotograf\IeC {\'\i }as de la placa \emph {OOCDLink}.\relax }}{14}}
|
\newlabel{fig:oocdlink-foto}{{17}{13}}
|
\newlabel{fig:oocdlink-foto}{{17}{14}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.4}Gastos en recursos de \textsl {hardware}}{14}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.4}Gastos en recursos de \textsl {hardware}}{15}}
|
\newlabel{sec:hw-gastos}{{1.4}{14}}
|
\newlabel{sec:hw-gastos}{{1.4}{15}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.1}Distribuidor de componentes electr\IeC {\'o}nicos}{14}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.1}Distribuidor de componentes electr\IeC {\'o}nicos}{15}}
|
\newlabel{sec:hw-distribuidor}{{1.4.1}{14}}
|
\newlabel{sec:hw-distribuidor}{{1.4.1}{15}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.2}Empresas de trasporte}{14}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.2}Empresas de trasporte}{15}}
|
\newlabel{sec:hw-transporte}{{1.4.2}{14}}
|
\newlabel{sec:hw-transporte}{{1.4.2}{15}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.3}Fabricante de PCB}{14}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.4.3}Fabricante de PCB}{15}}
|
\newlabel{sec:hw-fabricacion-pcb}{{1.4.3}{14}}
|
\newlabel{sec:hw-fabricacion-pcb}{{1.4.3}{15}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.5}Observaciones}{15}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {1.5}Observaciones}{16}}
|
\newlabel{sec:hw-obs}{{1.5}{15}}
|
\newlabel{sec:hw-obs}{{1.5}{16}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.5.1}Inconvenientes}{15}}
|
\@writefile{toc}{\contentsline {subsubsection}{\numberline {1.5.1}Inconvenientes}{16}}
|
\newlabel{sec:hw-obs-problem}{{1.5.1}{15}}
|
\newlabel{sec:hw-obs-problem}{{1.5.1}{16}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {18}{\ignorespaces Diagrama de Gantt para el desarrollo de la placa \emph {PHR}.\relax }}{16}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {18}{\ignorespaces Diagrama de Gantt para el desarrollo de la placa \emph {PHR}.\relax }}{17}}
|
\newlabel{fig:hw-envio-gantt}{{18}{16}}
|
\newlabel{fig:hw-envio-gantt}{{18}{17}}
|
\@writefile{toc}{\contentsline {section}{\numberline {2}Software}{17}}
|
\@writefile{toc}{\contentsline {section}{\numberline {2}Software}{18}}
|
\newlabel{chap:sw}{{2}{17}}
|
\newlabel{chap:sw}{{2}{18}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.1}Herramientas utilizadas}{17}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.1}Herramientas utilizadas}{18}}
|
\newlabel{sec:herramientas-sw}{{2.1}{17}}
|
\newlabel{sec:herramientas-sw}{{2.1}{18}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.2}Desarrollo de \textsl {Scripts}}{18}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.2}Desarrollo de \textsl {Scripts}}{19}}
|
\newlabel{sec:scripts-sw}{{2.2}{18}}
|
\newlabel{sec:scripts-sw}{{2.2}{19}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {19}{\ignorespaces Diagrama en bloque de la conexi\IeC {\'o}n entre el \textsl {Software} y el \textsl {Hardware}.\relax }}{18}}
|
\@writefile{lof}{\contentsline {figure}{\numberline {19}{\ignorespaces Diagrama en bloque de la conexi\IeC {\'o}n entre el \textsl {Software} y el \textsl {Hardware}.\relax }}{19}}
|
\newlabel{fig:scripts-diagrama}{{19}{18}}
|
\newlabel{fig:scripts-diagrama}{{19}{19}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.3}Repositorio del proyecto}{18}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.3}Repositorio del proyecto}{19}}
|
\newlabel{sec:sw-repo}{{2.3}{18}}
|
\newlabel{sec:sw-repo}{{2.3}{19}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.4}Observaciones}{18}}
|
\@writefile{toc}{\contentsline {subsection}{\numberline {2.4}Observaciones}{19}}
|
\newlabel{sec:sw-obs}{{2.4}{18}}
|
\newlabel{sec:sw-obs}{{2.4}{19}}
|
\@writefile{toc}{\contentsline {section}{\numberline {3}Transferencia}{19}}
|
\@writefile{toc}{\contentsline {section}{\numberline {3}Transferencia}{20}}
|
\newlabel{sec:transferencia}{{3}{19}}
|
\newlabel{sec:transferencia}{{3}{20}}
|
\@writefile{toc}{\contentsline {section}{\numberline {4}Conclusiones}{19}}
|
\@writefile{toc}{\contentsline {section}{\numberline {4}Conclusiones}{20}}
|
\newlabel{chap:conclusiones}{{4}{19}}
|
\newlabel{chap:conclusiones}{{4}{20}}
|
\@writefile{toc}{\contentsline {section}{\numberline {A}Colaboraci\IeC {\'o}n}{20}}
|
\@writefile{toc}{\contentsline {section}{\numberline {A}Colaboraci\IeC {\'o}n}{21}}
|
\newlabel{sec:app-participacion}{{A}{20}}
|
\newlabel{sec:app-participacion}{{A}{21}}
|
\@writefile{toc}{\contentsline {section}{\numberline {B}Agradecimiento}{20}}
|
\@writefile{toc}{\contentsline {section}{\numberline {B}Agradecimiento}{21}}
|
\newlabel{sec:app-agradecimiento}{{B}{20}}
|
\newlabel{sec:app-agradecimiento}{{B}{21}}
|
\newlabel{sec:app-agradecimiento}{{B}{21}}
|
\newlabel{sec:app-agradecimiento}{{B}{21}}
|
