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\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces PCB\relax }}{9}}
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\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces PCB\relax }}{9}}
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\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces PCB (Continuaci\IeC {\'o}n)\relax }}{10}}
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\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces PCB (Continuaci\IeC {\'o}n)\relax }}{10}}
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\@writefile{toc}{\contentsline {section}{\numberline {3}Documentaci\IeC {\'o}n}{10}}
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\@writefile{toc}{\contentsline {section}{\numberline {3}Documentaci\IeC {\'o}n}{10}}
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\@writefile{toc}{\contentsline {section}{\numberline {A}Repositorio de proyecto}{11}}
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\@writefile{toc}{\contentsline {section}{\numberline {A}Repositorio de proyecto}{11}}
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\@writefile{toc}{\contentsline {section}{\numberline {B}Archivos a conciderar}{11}}
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\@writefile{toc}{\contentsline {section}{\numberline {B}Archivos a conciderar}{11}}
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\@writefile{toc}{\contentsline {section}{\numberline {C}Lista de componentes}{12}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {C.1}OT-CPLD}{12}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {C.2}OOCD Links}{14}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {C.3}S3Power}{19}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {C.4}FPGA}{23}}
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