| Line 17... |
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\acronymused{TAP}
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\acronymused{TAP}
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\acronymused{TAP}
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\acronymused{TAP}
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\undonewlabel{acro:CPLD}
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\undonewlabel{acro:CPLD}
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\newlabel{acro:CPLD}{{}{1}}
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\newlabel{acro:CPLD}{{}{1}}
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\acronymused{CPLD}
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\acronymused{CPLD}
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\undonewlabel{acro:FPGA}
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\newlabel{acro:FPGA}{{}{1}}
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\acronymused{FPGA}
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\acronymused{CPLD}
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\acronymused{CPLD}
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\citation{2012-SSE-FIUBA-NT01-00}
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\citation{2012-SSE-FIUBA-NT01-00}
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\undonewlabel{acro:OPENOCD}
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\undonewlabel{acro:OPENOCD}
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\acronymused{OPENOCD}
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\acronymused{OPENOCD}
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\@writefile{toc}{\contentsline {section}{\numberline {1}Introducci\IeC {\'o}n}{2}}
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\@writefile{toc}{\contentsline {section}{\numberline {1}Introducci\IeC {\'o}n}{2}}
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| Line 79... |
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\acronymused{OPENOCD}
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\acronymused{OPENOCD}
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\acronymused{TAP}
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\acronymused{TAP}
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\acronymused{TAP}
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\acronymused{TAP}
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\@writefile{toc}{\contentsline {subsection}{\numberline {2.5}Multiples \ac {TAP}}{5}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {2.5}Multiples \ac {TAP}}{5}}
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\acronymused{jtag}
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\acronymused{jtag}
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\undonewlabel{acro:FPGA}
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\newlabel{acro:FPGA}{{2.5}{5}}
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\acronymused{FPGA}
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\acronymused{FPGA}
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\undonewlabel{acro:PROM}
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\undonewlabel{acro:PROM}
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\newlabel{acro:PROM}{{2.5}{5}}
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\newlabel{acro:PROM}{{2.5}{5}}
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\acronymused{PROM}
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\acronymused{PROM}
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\acronymused{CPLD}
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\acronymused{CPLD}
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\@writefile{toc}{\contentsline {subsection}{\numberline {2.6}Programaci\IeC {\'o}n \ac {CPLD}}{5}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {2.6}Programaci\IeC {\'o}n del \ac {CPLD}}{5}}
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\acronymused{CPLD}
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\acronymused{CPLD}
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\undonewlabel{acro:SVF}
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\undonewlabel{acro:SVF}
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\newlabel{acro:SVF}{{2.6}{5}}
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\newlabel{acro:SVF}{{2.6}{5}}
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\acronymused{SVF}
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\acronymused{SVF}
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\acronymused{SVF}
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\acronymused{SVF}
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| Line 113... |
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\acronymused{PHR}
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\acronymused{PHR}
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\acronymused{openocd}
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\acronymused{openocd}
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\acronymused{openocd}
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\acronymused{openocd}
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\acronymused{jtag}
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\acronymused{jtag}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.1}Instalaci\IeC {\'o}n del \textsl {software} xc3sprog}{7}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.1}Instalaci\IeC {\'o}n del \textsl {software} xc3sprog}{7}}
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\newlabel{sec:install-xc3sprog}{{3.1}{7}}
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\acronymused{SO}
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\acronymused{SO}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.2}Documentaci\IeC {\'o}n de comandos y \textsl {scripts}}{8}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.2}Documentaci\IeC {\'o}n de comandos y \textsl {scripts}}{8}}
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\acronymused{openocd}
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\acronymused{openocd}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.2.1}Configuraci\IeC {\'o}n del \textsl {interface}}{8}}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.2.1}Configuraci\IeC {\'o}n del \textsl {interface}}{8}}
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\newlabel{sec:xc3sprog-cablelist}{{3.2.1}{8}}
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\newlabel{sec:xc3sprog-cablelist}{{3.2.1}{8}}
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\acronymused{SO}
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\acronymused{SO}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.2.2}Dispositivos soportados}{9}}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.2.2}Dispositivos soportados}{9}}
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\newlabel{sec:xc3sprog-devlist}{{3.2.2}{9}}
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\newlabel{sec:xc3sprog-devlist}{{3.2.2}{9}}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.2.3}Comandos b\IeC {\'a}sicos}{10}}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.2.3}Comandos b\IeC {\'a}sicos}{10}}
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\newlabel{sec:xc3sprog-com-bas}{{3.2.3}{10}}
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\newlabel{sec:xc3sprog-com-bas}{{3.2.3}{10}}
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\acronymused{FPGA}
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\acronymused{FPGA}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.3}Programaci\IeC {\'o}n de \ac {FPGA} y memoria PROM}{13}}
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\acronymused{PHR}
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\acronymused{PHR}
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\acronymused{SO}
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\acronymused{PHR}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.3.1}Programaci\IeC {\'o}n de la FPGA}{13}}
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\newlabel{sec:prog-phr-fpga}{{3.3.1}{13}}
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\acronymused{FPGA}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {3.3.2}Programaci\IeC {\'o}n de la memoria PROM}{14}}
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\newlabel{sec:prog-phr-prom}{{3.3.2}{14}}
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\bibcite{2012-SSE-FIUBA-NT01-00}{1}
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\bibcite{2012-SSE-FIUBA-NT01-00}{1}
|
\bibcite{openocd-manual-autoprobing}{2}
|
\bibcite{openocd-manual-autoprobing}{2}
|
\acronymused{CPLD}
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\acronymused{CPLD}
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\acronymused{CPLD}
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\acronymused{CPLD}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.3}Programaci\IeC {\'o}n \ac {CPLD}}{13}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.4}Programaci\IeC {\'o}n del \ac {CPLD}}{15}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {3.4}\textsl {Debugging}}{13}}
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\@writefile{toc}{\contentsline {section}{\numberline {4}Documentaci\IeC {\'o}n}{15}}
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\@writefile{toc}{\contentsline {section}{\numberline {4}Documentaci\IeC {\'o}n}{13}}
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\acronymused{openocd}
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\acronymused{openocd}
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\acronymused{openocd}
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\acronymused{openocd}
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\@writefile{toc}{\contentsline {section}{\numberline {A}Acr\IeC {\'o}nimos}{14}}
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\@writefile{toc}{\contentsline {section}{\numberline {A}Acr\IeC {\'o}nimos}{16}}
|
\newacro{PHR}[\AC@hyperlink{PHR}{PHR}]{Plataforma de Hardware Reconfigurable}
|
\newacro{PHR}[\AC@hyperlink{PHR}{PHR}]{Plataforma de Hardware Reconfigurable}
|
\newacro{openocd}[\AC@hyperlink{openocd}{OpenOCD}]{\textsl {Open On-Chip Debugger}}
|
\newacro{openocd}[\AC@hyperlink{openocd}{OpenOCD}]{\textsl {Open On-Chip Debugger}}
|
\newacro{jtag}[\AC@hyperlink{jtag}{JTAG}]{\textsl {Joint Test Action Group}}
|
\newacro{jtag}[\AC@hyperlink{jtag}{JTAG}]{\textsl {Joint Test Action Group}}
|
\newacro{TAP}[\AC@hyperlink{TAP}{TAP}]{\textsl {Test Access Port}}
|
\newacro{TAP}[\AC@hyperlink{TAP}{TAP}]{\textsl {Test Access Port}}
|
\newacro{SVF}[\AC@hyperlink{SVF}{SVF}]{\textsl {Serial Vector Format}}
|
\newacro{SVF}[\AC@hyperlink{SVF}{SVF}]{\textsl {Serial Vector Format}}
|
| Line 144... |
Line 157... |
\newacro{FPGA}[\AC@hyperlink{FPGA}{FPGA}]{\textsl {Field Programmable Gate Array}}
|
\newacro{FPGA}[\AC@hyperlink{FPGA}{FPGA}]{\textsl {Field Programmable Gate Array}}
|
\newacro{PROM}[\AC@hyperlink{PROM}{PROM}]{\textsl {Programmable Read-Only Memory}}
|
\newacro{PROM}[\AC@hyperlink{PROM}{PROM}]{\textsl {Programmable Read-Only Memory}}
|
\newacro{SO}[\AC@hyperlink{SO}{SO}]{sistema operativo}
|
\newacro{SO}[\AC@hyperlink{SO}{SO}]{sistema operativo}
|
\newacro{GPL}[\AC@hyperlink{GPL}{GPL}]{\textsl {General Public License}}
|
\newacro{GPL}[\AC@hyperlink{GPL}{GPL}]{\textsl {General Public License}}
|
\newacro{UTN-FRC}[\AC@hyperlink{UTN-FRC}{UTN-FRC}]{Universidad Tecnol\IeC {\'o}gica Nacional -- Facultad Regional C\IeC {\'o}rdoba}
|
\newacro{UTN-FRC}[\AC@hyperlink{UTN-FRC}{UTN-FRC}]{Universidad Tecnol\IeC {\'o}gica Nacional -- Facultad Regional C\IeC {\'o}rdoba}
|
\@writefile{toc}{\contentsline {section}{\numberline {B}Repositorio de proyecto}{14}}
|
\@writefile{toc}{\contentsline {section}{\numberline {B}Repositorio de proyecto}{16}}
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\@writefile{toc}{\contentsline {section}{\numberline {B}Repositorio de proyecto}{16}}
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\@writefile{toc}{\contentsline {section}{\numberline {B}Repositorio de proyecto}{16}}
|
