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https://opencores.org/ocsvn/phr/phr/trunk
[/] [phr/] [trunk/] [placas/] [OT-CPLD/] [cpld.pro] - Diff between revs 5 and 72
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| Rev 5 |
Rev 72 |
| Line 1... |
Line 1... |
update=lun 07 nov 2011 18:28:23 ART
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update=mar 28 ago 2012 20:43:52 ART
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last_client=pcbnew
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last_client=eeschema
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[general]
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[general]
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version=1
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version=1
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[cvpcb]
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version=1
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NetIExt=net
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[cvpcb/libraries]
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EquName1=devcms
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[pcbnew]
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version=1
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PadDrlX=320
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PadDimH=600
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PadDimV=600
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BoardThickness=630
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RouteTo=15
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RouteBo=0
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Segm45=1
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Racc45=1
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SgPcb45=1
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TxtPcbV=800
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TxtPcbH=600
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TxtModV=600
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TxtModH=600
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TxtModW=120
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VEgarde=100
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DrawLar=150
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EdgeLar=150
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TxtLar=120
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MSegLar=150
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WpenSer=10
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[pcbnew/libraries]
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LibDir=
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LibName1=sockets
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LibName2=connect
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LibName3=discret
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LibName4=pin_array
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LibName5=divers
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LibName6=libcms
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LibName7=display
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LibName8=valves
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LibName9=led
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LibName10=dip_sockets
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LibName11=pin_array_x1
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LibName12=R_PIN_ARRAY_10x2
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LibName13=R_PIN_ARRAY_20x2
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[eeschema]
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[eeschema]
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version=1
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version=1
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LibDir=
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LibDir=
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NetFmt=1
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NetFmt=1
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HPGLSpd=20
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HPGLSpd=20
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| Line 71... |
Line 113... |
LibName31=xc2c64
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LibName31=xc2c64
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LibName32=xilinx_xc9572xl-tq100
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LibName32=xilinx_xc9572xl-tq100
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LibName33=xc9572xl
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LibName33=xc9572xl
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LibName34=sp6200
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LibName34=sp6200
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LibName35=conn_20x2_DIP40
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LibName35=conn_20x2_DIP40
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[cvpcb]
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version=1
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NetIExt=net
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[cvpcb/libraries]
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EquName1=devcms
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[pcbnew]
|
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version=1
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|
PadDrlX=320
|
|
PadDimH=600
|
|
PadDimV=600
|
|
BoardThickness=630
|
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RouteTo=15
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RouteBo=0
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Segm45=1
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Racc45=1
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SgPcb45=1
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TxtPcbV=800
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TxtPcbH=600
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TxtModV=600
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TxtModH=600
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TxtModW=120
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VEgarde=100
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DrawLar=150
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EdgeLar=150
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TxtLar=120
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MSegLar=150
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WpenSer=10
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[pcbnew/libraries]
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LibDir=
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LibName1=sockets
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LibName2=connect
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LibName3=discret
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LibName4=pin_array
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LibName5=divers
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LibName6=libcms
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LibName7=display
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LibName8=valves
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LibName9=led
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LibName10=dip_sockets
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LibName11=pin_array_x1
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LibName12=R_PIN_ARRAY_10x2
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LibName13=R_PIN_ARRAY_20x2
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