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Line 44... |
signal addr_a1, addr_a2, addr_b : std_logic_vector(4 downto 0);
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signal addr_a1, addr_a2, addr_b : std_logic_vector(4 downto 0);
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signal data_out1, data_out2 : std_logic_vector(31 downto 0);
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signal data_out1, data_out2 : std_logic_vector(31 downto 0);
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signal write_enable : std_logic;
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signal write_enable : std_logic;
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-- signal sig_false : std_logic := '0';
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-- signal sig_false : std_logic := '0';
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-- signal sig_true : std_logic := '1';
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-- signal sig_true : std_logic := '1';
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-- signal zero_sig : std_logic_vector(15 downto 0) := ZERP(15 downto 0);
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-- signal zero_sig : std_logic_vector(15 downto 0) := ZERO(15 downto 0);
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begin
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begin
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reg_proc: process(clk, rs_index, rt_index, rd_index, reg_dest_new,
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reg_proc: process(clk, rs_index, rt_index, rd_index, reg_dest_new,
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intr_enable_reg, data_out1, data_out2, reset_in)
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intr_enable_reg, data_out1, data_out2, reset_in, pause)
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begin
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begin
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--setup for first dual-port memory
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--setup for first dual-port memory
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if rs_index = "101110" then --reg_epc CP0 14
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if rs_index = "101110" then --reg_epc CP0 14
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addr_a1 <= "00000";
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addr_a1 <= "00000";
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else
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else
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