| Line 65... |
Line 65... |
-- 002c a2820000 sb $v0,0($s4)
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-- 002c a2820000 sb $v0,0($s4)
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-- 0030 340a0041 li $t2,0x41
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-- 0030 340a0041 li $t2,0x41
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-- 0034 340b0042 li $t3,0x42
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-- 0034 340b0042 li $t3,0x42
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---------------------------------------------------------------------
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---------------------------------------------------------------------
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library ieee;
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library ieee;
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use work.mlite_pack.all;
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--library ieee, mlite_lib;
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--use mlite_lib.mlite_pack.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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use work.mlite_pack.all;
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entity mlite_cpu is
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entity mlite_cpu is
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generic(memory_type : string := "ALTERA";
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generic(memory_type : string := "DUAL_PORT_XILINX_XC4000XLA";
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adder_type : string := "GENERIC";
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mult_type : string := "AREA_OPTIMIZED";
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shifter_type : string := "GENERIC";
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alu_type : string := "GENERIC";
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pipeline_stages : natural := 3;
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pipeline_stages : natural := 3;
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accurate_timing : boolean := true);
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accurate_timing : boolean := true);
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port(clk : in std_logic;
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port(clk : in std_logic;
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reset_in : in std_logic;
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reset_in : in std_logic;
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intr_in : in std_logic;
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intr_in : in std_logic;
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| Line 153... |
Line 159... |
reset_reg <= "0000";
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reset_reg <= "0000";
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elsif rising_edge(clk) then
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elsif rising_edge(clk) then
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if reset_reg /= "1111" then
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if reset_reg /= "1111" then
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reset_reg <= reset_reg + 1;
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reset_reg <= reset_reg + 1;
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end if;
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end if;
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end if;
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if rising_edge(clk) then
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--don't try to interrupt a multi-cycle instruction
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--don't try to interrupt a multi-cycle instruction
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if intr_in = '1' and intr_enable = '1' and
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if intr_in = '1' and intr_enable = '1' and
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pc_source = from_inc4 and pc(2) = '0' and
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pc_source = from_inc4 and pc(2) = '0' and
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pause_any = '0' then
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pause_any = '0' then
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--the epc will be backed up one opcode (pc-4)
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--the epc will be backed up one opcode (pc-4)
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| Line 252... |
Line 256... |
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branch_func => branch_func,
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branch_func => branch_func,
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take_branch => take_branch);
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take_branch => take_branch);
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u6_alu: alu
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u6_alu: alu
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generic map (adder_type => memory_type)
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generic map (adder_type => adder_type,
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alu_type => alu_type)
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port map (
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port map (
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a_in => a_busD,
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a_in => a_busD,
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b_in => b_busD,
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b_in => b_busD,
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alu_function => alu_funcD,
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alu_function => alu_funcD,
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c_alu => c_alu);
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c_alu => c_alu);
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u7_shifter: shifter port map (
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u7_shifter: shifter
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generic map (shifter_type => shifter_type)
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port map (
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value => b_busD,
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value => b_busD,
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shift_amount => a_busD(4 downto 0),
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shift_amount => a_busD(4 downto 0),
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shift_func => shift_funcD,
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shift_func => shift_funcD,
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c_shift => c_shift);
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c_shift => c_shift);
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u8_mult: mult
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u8_mult: mult
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generic map (adder_type => memory_type)
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generic map (adder_type => adder_type,
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mult_type => mult_type)
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port map (
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port map (
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clk => clk,
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clk => clk,
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a => a_busD,
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a => a_busD,
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b => b_busD,
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b => b_busD,
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mult_func => mult_funcD,
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mult_func => mult_funcD,
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