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[/] [plasma/] [trunk/] [vhdl/] [mlite_pack.vhd] - Diff between revs 352 and 383

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Rev 352 Rev 383
Line 346... Line 346...
           mem_pause    : in std_logic);
           mem_pause    : in std_logic);
   end component;
   end component;
 
 
   component cache
   component cache
      generic(memory_type : string := "DEFAULT");
      generic(memory_type : string := "DEFAULT");
 
 
      port(clk            : in std_logic;
      port(clk            : in std_logic;
           reset          : in std_logic;
           reset          : in std_logic;
           address_next   : in std_logic_vector(31 downto 2);
           address_next   : in std_logic_vector(31 downto 2);
           byte_we_next   : in std_logic_vector(3 downto 0);
           byte_we_next   : in std_logic_vector(3 downto 0);
           cpu_address    : in std_logic_vector(31 downto 2);
           cpu_address    : in std_logic_vector(31 downto 2);
           mem_busy       : in std_logic;
           mem_busy       : in std_logic;
 
 
           cache_check    : out std_logic;   --Stage1: address_next in first 2MB DDR
           cache_access   : out std_logic;   --access 4KB cache
           cache_checking : out std_logic;   --Stage2: cache checking
           cache_checking : out std_logic;   --checking if cache hit
           cache_miss     : out std_logic);  --Stage2-3: cache miss
           cache_miss     : out std_logic);  --cache miss
   end component; --cache
   end component; --cache
 
 
   component ram
   component ram
      generic(memory_type : string := "DEFAULT");
      generic(memory_type : string := "DEFAULT");
      port(clk               : in std_logic;
      port(clk               : in std_logic;

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