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https://opencores.org/ocsvn/pltbutils/pltbutils/trunk
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pltbutils release_note.txt
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pltbutils release_note.txt
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alpha0007 January 13, 2014
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1. Renamed example/vhdl/*.* to examples/vhdl/examples2/*.*
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This is example code where the testcase process(es) are located
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in a testcase component, enabling multiple testcase architectures.
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Renamed sim/example_sim/ to sim/modelsim_tb_example2/
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2. Created examples/vhdl/examples1/
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This is example code where the testcase process is located in the
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testbench top.
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Created sim/modelsim_tb_example1/
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3. Renamed sim/bench_sim/ to sim/modelsim_tb_pltbutils/
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4. Renamed template/vhdl/*.* to templates/vhdl/template2/*.*
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5. Created templates/vhdl/template1/
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6. Updated specification_pltbutils.docx/pdf to rev 0.5
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alpha0006 January 09, 2014
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alpha0006 January 09, 2014
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1. Replaced shared variables with a normal variable, and global signals with
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1. Replaced shared variables with a normal variable, and global signals with
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a normal signal.
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a normal signal.
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VHDL-2000 and later requires that shared variables use protected types,
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VHDL-2000 and later requires that shared variables use protected types,
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but protected types weren't available in earlier VHDL versions.
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but protected types weren't available in earlier VHDL versions.
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