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[/] [pltbutils/] [branches/] [dev0007/] [examples/] [vhdl/] [tb_example2/] [tb_example2.vhd] - Diff between revs 63 and 65

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Line 1... Line 1...
----------------------------------------------------------------------
----------------------------------------------------------------------
----                                                              ----
----                                                              ----
---- PlTbUtils Example Testbench                                  ----
---- PlTbUtils Testbench Example 2                                ----
----                                                              ----
----                                                              ----
---- This file is part of the PlTbUtils project                   ----
---- This file is part of the PlTbUtils project                   ----
---- http://opencores.org/project,pltbutils                       ----
---- http://opencores.org/project,pltbutils                       ----
----                                                              ----
----                                                              ----
---- Description:                                                 ----
---- Description:                                                 ----
Line 49... Line 49...
library ieee;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_1164.all;
use work.pltbutils_func_pkg.all;
use work.pltbutils_func_pkg.all;
use work.pltbutils_comp_pkg.all;
use work.pltbutils_comp_pkg.all;
 
 
entity tb_example is
entity tb_example2 is
  generic (
  generic (
    G_WIDTH             : integer := 8;
    G_WIDTH             : integer := 8;
    G_CLK_PERIOD        : time := 10 ns;
    G_CLK_PERIOD        : time := 10 ns;
    G_DISABLE_BUGS      : integer range 0 to 1 := 0
    G_DISABLE_BUGS      : integer range 0 to 1 := 0
  );
  );
end entity tb_example;
end entity tb_example2;
 
 
architecture bhv of tb_example is
architecture bhv of tb_example2 is
 
 
  -- Simulation status- and control signals
  -- Simulation status- and control signals
  -- for accessing .stop_sim and for viewing in waveform window
  -- for accessing .stop_sim and for viewing in waveform window
  signal pltbs          : pltbs_t := C_PLTBS_INIT;
  signal pltbs          : pltbs_t := C_PLTBS_INIT;
 
 
Line 98... Line 98...
    port map(
    port map(
      clk_o             => clk,
      clk_o             => clk,
      stop_sim_i        => pltbs.stop_sim
      stop_sim_i        => pltbs.stop_sim
    );
    );
 
 
  tc0 : entity work.tc_example
  tc0 : entity work.tc_example2
    generic map (
    generic map (
      G_WIDTH           => G_WIDTH,
      G_WIDTH           => G_WIDTH,
      G_DISABLE_BUGS    => G_DISABLE_BUGS
      G_DISABLE_BUGS    => G_DISABLE_BUGS
    )
    )
    port map(
    port map(

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