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[/] [pltbutils/] [branches/] [dev_beta0002/] [templates/] [vhdl/] [template2/] [tc1.vhd] - Diff between revs 2 and 44

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---- Author(s):                                                   ----
---- Author(s):                                                   ----
---- - Per Larsson, pela@opencores.org                            ----
---- - Per Larsson, pela@opencores.org                            ----
----                                                              ----
----                                                              ----
----------------------------------------------------------------------
----------------------------------------------------------------------
----                                                              ----
----                                                              ----
---- Copyright (C) 2013 Authors and OPENCORES.ORG                 ----
---- Copyright (C) 2013-2014 Authors and OPENCORES.ORG            ----
----                                                              ----
----                                                              ----
---- This source file may be used and distributed without         ----
---- This source file may be used and distributed without         ----
---- restriction provided that this copyright statement is not    ----
---- restriction provided that this copyright statement is not    ----
---- removed from the file and that any derivative work contains  ----
---- removed from the file and that any derivative work contains  ----
---- the original copyright notice and the associated disclaimer. ----
---- the original copyright notice and the associated disclaimer. ----
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----                                                              ----
----                                                              ----
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library ieee;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.numeric_std.all;
 
--use work.txt_util.all;
use work.pltbutils_func_pkg.all;
use work.pltbutils_func_pkg.all;
 
 
architecture tc1 of tc_template is
architecture tc1 of tc_template is
begin
begin
  p_tc1 : process
  p_tc1 : process
 
    variable pltbv  : pltbv_t := C_PLTBV_INIT;
  begin
  begin
    startsim("tc1", pltbutils_sc);
    startsim("tc1", pltbv, pltbs);
    rst         <= '1'; -- Template example
    rst         <= '1'; -- Template example
    -- < Template info: initialize other DUT stimuli here. >
    -- < Template info: initialize other DUT stimuli here. >
 
 
    testname(1, "Reset test", pltbutils_sc); -- Template example
    starttest(1, "Reset test", pltbv, pltbs); -- Template example
    waitclks(2, clk, pltbutils_sc); -- Template example
    waitclks(2, clk, pltbv, pltbs); -- Template example
    check("template_signal during reset", template_signal, 0, pltbutils_sc); -- Template example
    check("template_signal during reset", template_signal, 0, pltbv, pltbs); -- Template example
    -- < Template info: check other DUT outputs here. 
    -- < Template info: check other DUT outputs here. 
    rst  <= '0'; -- Template example
    rst  <= '0'; -- Template example
 
    endtest(pltbv, pltbs);
 
 
    testname(2, "Template test", pltbutils_sc);
    starttest(2, "Template test", pltbv, pltbs);
    -- < Template info: set all relevant DUT inputs here. >
    -- < Template info: set all relevant DUT inputs here. >
    waitclks(2, clk, pltbutils_sc); -- Template example
    waitclks(2, clk, pltbv, pltbs); -- Template example
    -- < Template info: check all relevant DUT outputs here. >
    -- < Template info: check all relevant DUT outputs here. >
 
    endtest(pltbv, pltbs);
    -- < Template info: add more tests here. >
    -- < Template info: add more tests here. >
 
 
    endsim(pltbutils_sc, true);
    endsim(pltbv, pltbs, true);
    wait;
    wait;
  end process p_tc1;
  end process p_tc1;
end architecture tc1;
end architecture tc1;
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