| Line 24... |
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---- Author(s): ----
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---- Author(s): ----
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---- - Per Larsson, pela@opencores.org ----
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---- - Per Larsson, pela@opencores.org ----
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---- ----
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---- ----
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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---- ----
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---- ----
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---- Copyright (C) 2013 Authors and OPENCORES.ORG ----
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---- Copyright (C) 2013-2014 Authors and OPENCORES.ORG ----
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---- ----
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---- ----
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---- This source file may be used and distributed without ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- restriction provided that this copyright statement is not ----
|
---- removed from the file and that any derivative work contains ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- the original copyright notice and the associated disclaimer. ----
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| Line 50... |
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---- from http://www.opencores.org/lgpl.shtml ----
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---- from http://www.opencores.org/lgpl.shtml ----
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---- ----
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---- ----
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use work.pltbutils_func_pkg.all;
|
|
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entity tc_template is
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entity tc_template is
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generic (
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generic (
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-- < Template info: add generics here if needed, or remove the generic block >
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-- < Template info: add generics here if needed, or remove the generic block >
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);
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);
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port (
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port (
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pltbs : out pltbs_t;
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clk : in std_logic; -- Template example
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clk : in std_logic; -- Template example
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rst : out std_logic; -- Template example
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rst : out std_logic; -- Template example
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-- < Template info: add more ports for testcase component here. >
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-- < Template info: add more ports for testcase component here. >
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-- < Inputs on the DUT should be outputs here, >
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-- < Inputs on the DUT should be outputs here, >
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-- < and vice versa. >
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-- < and vice versa. >
|
