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---- Author(s): ----
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---- Author(s): ----
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---- - Per Larsson, pela.opencores@gmail.com ----
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---- - Per Larsson, pela.opencores@gmail.com ----
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---- ----
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---- ----
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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---- ----
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---- ----
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---- Copyright (C) 2013 Authors and OPENCORES.ORG ----
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---- Copyright (C) 2013-2020 Authors and OPENCORES.ORG ----
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---- ----
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---- ----
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---- This source file may be used and distributed without ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- the original copyright notice and the associated disclaimer. ----
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Line 81... |
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clk_n_o <= not clk;
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clk_n_o <= not clk;
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end architecture bhv;
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end architecture bhv;
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----------------------------------------------------------------------
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-- pltbutils_time_measure
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-- Measures high-time, low-time and period of a signal, usually a
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-- clock.
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-- Setting G_VERBOSITY to at least 20 reports measures times.
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-- Set G_RPT_LABEL to a prefix used in reports, typically the name
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-- of the signal being measured.
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----------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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entity pltbutils_time_measure is
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generic (
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G_VERBOSITY : integer := 0;
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G_RPT_LABEL : string := "pltbutils_time_measure"
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);
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port (
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t_hi_o : out time; -- High time
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t_lo_o : out time; -- Low time
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t_per_o : out time; -- Period time
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s_i : in std_logic -- Signal to measure
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);
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end entity pltbutils_time_measure;
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architecture bhv of pltbutils_time_measure is
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signal t_hi : time := 0 ns;
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signal t_lo : time := 0 ns;
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signal t_per : time := 0 ns;
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begin
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measure_p : process (s_i)
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variable last_rising_edge : time := -1 ns;
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variable last_falling_edge : time := -1 ns;
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begin
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if rising_edge(s_i) then
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if last_falling_edge >= 0 ns then
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t_lo <= now - last_falling_edge;
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end if;
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if last_rising_edge >= 0 ns then
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t_per <= now - last_rising_edge;
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end if;
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last_rising_edge := now;
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end if;
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if falling_edge(s_i) then
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if last_rising_edge >= 0 ns then
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t_hi <= now - last_rising_edge;
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end if;
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last_falling_edge := now;
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end if;
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end process measure_p;
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assert not (G_VERBOSITY > 20 and t_lo'event)
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report G_RPT_LABEL & ": t_lo=" & time'image(t_lo)
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severity note;
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assert not (G_VERBOSITY > 20 and t_hi'event)
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report G_RPT_LABEL & ": t_hi=" & time'image(t_hi)
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severity note;
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assert not (G_VERBOSITY > 20 and t_per'event)
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report G_RPT_LABEL & ": t_hi=" & time'image(t_per)
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severity note;
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t_hi_o <= t_hi;
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t_lo_o <= t_lo;
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t_per_o <= t_per;
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end architecture bhv;
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----------------------------------------------------------------------
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-- pltbutils_diff_check
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-- Checks that the negative half of a diff pair is the
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-- always the complement of the positive half.
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-- Setting G_VERBOSITY to at least 100 reports number of diff errors.
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-- Set G_RPT_LABEL to a prefix used in reports, typically the name
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-- of the signal being measured.
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----------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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entity pltbutils_diff_check is
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generic (
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G_VERBOSITY : integer := 0;
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G_RPT_LABEL : string := "pltbutils_diff_check"
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);
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port (
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diff_error_o : out std_logic; -- High when diff error detected
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diff_errors_o : out integer; -- Number of diff errors detected
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s_i : in std_logic; -- Pos half of diff pair to check
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s_n_i : in std_logic := '0'; -- Neg half of diff pair to check
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rst_errors_i : in std_logic := '0' -- High resets diff error counter
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);
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end entity pltbutils_diff_check;
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architecture bhv of pltbutils_diff_check is
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constant C_INTEGER_MAX : integer := (2**30) + ((2**30)-1); -- Equals (2**31)-1 without overflowing;
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signal diff_error : std_logic := '0';
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signal diff_errors : integer := 0;
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begin
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diff_check_p : process (s_i, s_n_i, rst_errors_i)
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-- TODO: allow a small (configurable) timing tolerance between edges of s_i and s_n_i
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begin
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if s_i /= not s_n_i then
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diff_error <= '1';
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if diff_errors < C_INTEGER_MAX then
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diff_errors <= diff_errors + 1;
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end if;
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else
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diff_error <= '0';
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end if;
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if rst_errors_i = '1' then
|
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diff_errors <= 0;
|
|
end if;
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|
end process diff_check_p;
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assert not (G_VERBOSITY > 100 and diff_errors'event)
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report G_RPT_LABEL & ": diff_errors=" & integer'image(diff_errors)
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severity note;
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diff_error_o <= diff_error;
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diff_errors_o <= diff_errors;
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end architecture bhv;
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No newline at end of file
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No newline at end of file
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