OpenCores
URL https://opencores.org/ocsvn/pltbutils/pltbutils/trunk

Subversion Repositories pltbutils

[/] [pltbutils/] [trunk/] [src/] [vhdl/] [pltbutils_comp.vhd] - Diff between revs 97 and 107

Show entire file | Details | Blame | View Log

Rev 97 Rev 107
Line 19... Line 19...
---- Author(s):                                                   ----
---- Author(s):                                                   ----
---- - Per Larsson, pela.opencores@gmail.com                      ----
---- - Per Larsson, pela.opencores@gmail.com                      ----
----                                                              ----
----                                                              ----
----------------------------------------------------------------------
----------------------------------------------------------------------
----                                                              ----
----                                                              ----
---- Copyright (C) 2013 Authors and OPENCORES.ORG                 ----
---- Copyright (C) 2013-2020 Authors and OPENCORES.ORG            ----
----                                                              ----
----                                                              ----
---- This source file may be used and distributed without         ----
---- This source file may be used and distributed without         ----
---- restriction provided that this copyright statement is not    ----
---- restriction provided that this copyright statement is not    ----
---- removed from the file and that any derivative work contains  ----
---- removed from the file and that any derivative work contains  ----
---- the original copyright notice and the associated disclaimer. ----
---- the original copyright notice and the associated disclaimer. ----
Line 81... Line 81...
  clk_n_o   <= not clk;
  clk_n_o   <= not clk;
 
 
end architecture bhv;
end architecture bhv;
 
 
 
 
 
----------------------------------------------------------------------
 
-- pltbutils_time_measure
 
-- Measures high-time, low-time and period of a signal, usually a
 
-- clock.
 
-- Setting G_VERBOSITY to at least 20 reports measures times. 
 
-- Set G_RPT_LABEL to a prefix used in reports, typically the name
 
-- of the signal being measured. 
 
----------------------------------------------------------------------
 
library ieee;
 
use ieee.std_logic_1164.all;
 
 
 
entity pltbutils_time_measure is
 
  generic (
 
    G_VERBOSITY     : integer := 0;
 
    G_RPT_LABEL     : string  := "pltbutils_time_measure"
 
  );
 
  port (
 
    t_hi_o          : out time;             -- High time
 
    t_lo_o          : out time;             -- Low time
 
    t_per_o         : out time;             -- Period time
 
    s_i             : in  std_logic         -- Signal to measure
 
  );
 
end entity pltbutils_time_measure;
 
 
 
architecture bhv of pltbutils_time_measure is
 
  signal   t_hi         : time := 0 ns;
 
  signal   t_lo         : time := 0 ns;
 
  signal   t_per        : time := 0 ns;
 
begin
 
 
 
  measure_p : process (s_i)
 
    variable last_rising_edge  : time := -1 ns;
 
    variable last_falling_edge : time := -1 ns;
 
  begin
 
    if rising_edge(s_i) then
 
      if last_falling_edge >= 0 ns then
 
        t_lo <= now - last_falling_edge;
 
      end if;
 
      if last_rising_edge >= 0 ns then
 
        t_per <= now - last_rising_edge;
 
      end if;
 
      last_rising_edge := now;
 
    end if;
 
 
 
    if falling_edge(s_i) then
 
      if last_rising_edge >= 0 ns then
 
        t_hi <= now - last_rising_edge;
 
      end if;
 
      last_falling_edge := now;
 
    end if;
 
  end process measure_p;
 
 
 
  assert not (G_VERBOSITY >  20 and t_lo'event)
 
    report G_RPT_LABEL & ": t_lo=" & time'image(t_lo)
 
    severity note;
 
 
 
  assert not (G_VERBOSITY >  20 and t_hi'event)
 
    report G_RPT_LABEL & ": t_hi=" & time'image(t_hi)
 
    severity note;
 
 
 
  assert not (G_VERBOSITY >  20 and t_per'event)
 
    report G_RPT_LABEL & ": t_hi=" & time'image(t_per)
 
    severity note;
 
 
 
  t_hi_o        <= t_hi;
 
  t_lo_o        <= t_lo;
 
  t_per_o       <= t_per;
 
 
 
end architecture bhv;
 
 
 
 
 
----------------------------------------------------------------------
 
-- pltbutils_diff_check
 
-- Checks that the negative half of a diff pair is the
 
-- always the complement of the positive half.
 
-- Setting G_VERBOSITY to at least 100 reports number of diff errors.
 
-- Set G_RPT_LABEL to a prefix used in reports, typically the name
 
-- of the signal being measured. 
 
----------------------------------------------------------------------
 
library ieee;
 
use ieee.std_logic_1164.all;
 
 
 
entity pltbutils_diff_check is
 
  generic (
 
    G_VERBOSITY     : integer := 0;
 
    G_RPT_LABEL     : string  := "pltbutils_diff_check"
 
  );
 
  port (
 
    diff_error_o    : out std_logic;        -- High when diff error detected
 
    diff_errors_o   : out integer;          -- Number of diff errors detected
 
    s_i             : in  std_logic;        -- Pos half of diff pair to check
 
    s_n_i           : in  std_logic := '0'; -- Neg half of diff pair to check
 
    rst_errors_i    : in  std_logic := '0'  -- High resets diff error counter
 
  );
 
end entity pltbutils_diff_check;
 
 
 
architecture bhv of pltbutils_diff_check is
 
  constant C_INTEGER_MAX : integer := (2**30) + ((2**30)-1); -- Equals (2**31)-1 without overflowing;
 
  signal   diff_error   : std_logic := '0';
 
  signal   diff_errors  : integer := 0;
 
begin
 
 
 
  diff_check_p : process (s_i, s_n_i, rst_errors_i)
 
  -- TODO: allow a small (configurable) timing tolerance between edges of s_i and s_n_i
 
  begin
 
    if s_i /= not s_n_i then
 
      diff_error  <= '1';
 
      if diff_errors < C_INTEGER_MAX then
 
        diff_errors <= diff_errors + 1;
 
      end if;
 
    else
 
      diff_error  <= '0';
 
    end if;
 
    if rst_errors_i = '1' then
 
      diff_errors <= 0;
 
    end if;
 
  end process diff_check_p;
 
 
 
  assert not (G_VERBOSITY > 100 and diff_errors'event)
 
    report G_RPT_LABEL & ": diff_errors=" & integer'image(diff_errors)
 
    severity note;
 
 
 
  diff_error_o  <= diff_error;
 
  diff_errors_o <= diff_errors;
 
 
 
end architecture bhv;
 
 
 
 
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.