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---- Author(s): ----
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---- Author(s): ----
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---- - Per Larsson, pela.opencores@gmail.com ----
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---- - Per Larsson, pela.opencores@gmail.com ----
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---- ----
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---- ----
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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---- ----
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---- ----
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---- Copyright (C) 2013 Authors and OPENCORES.ORG ----
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---- Copyright (C) 2013-2020 Authors and OPENCORES.ORG ----
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---- ----
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---- ----
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---- This source file may be used and distributed without ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- the original copyright notice and the associated disclaimer. ----
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| Line 76... |
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-- G_INITVALUE => '0'
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-- G_INITVALUE => '0'
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-- )
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-- )
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-- port map (
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-- port map (
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-- clk_o => clk,
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-- clk_o => clk,
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-- clk_n_o => clk_n,
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-- clk_n_o => clk_n,
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-- stop_sim_i => stop_sim
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-- stop_sim_i => pltbs.stop_sim
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-- );
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component pltbutils_time_measure is
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generic (
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G_VERBOSITY : integer := 0;
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G_RPT_LABEL : string := "pltbutils_time_measure"
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);
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port (
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t_hi_o : out time; -- High time
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t_lo_o : out time; -- Low time
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t_per_o : out time; -- Period time
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s_i : in std_logic -- Signal to measure
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);
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end component pltbutils_time_measure;
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-- Instansiation template
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-- (copy to your own file and remove the comment characters):
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--pltbutils_time_measure0 : pltbutils_time_measure
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-- generic map (
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-- G_VERBOSITY => G_VERBOSITY
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-- G_RPT_LABEL => "sig"
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-- )
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-- port map (
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-- t_hi_o => sig_t_hi,
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-- t_lo_o => sig_t_lo,
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-- t_per_o => sig_t_per,
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-- s_i => sig
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-- );
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component pltbutils_diff_check is
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generic (
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G_VERBOSITY : integer := 0;
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G_RPT_LABEL : string := "pltbutils_diff_check"
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);
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port (
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diff_error_o : out std_logic; -- High when diff error detected
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diff_errors_o : out integer; -- Number of diff errors detected
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s_i : in std_logic; -- Pos half of diff pair to check
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s_n_i : in std_logic := '0'; -- Neg half of diff pair to check
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rst_errors_i : in std_logic := '0' -- High resets diff error counter
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);
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end component pltbutils_diff_check;
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-- Instansiation template
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-- (copy to your own file and remove the comment characters):
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--pltbutils_diff_check0 : pltbutils_diff_check
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-- generic map (
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-- G_VERBOSITY => G_VERBOSITY
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-- G_RPT_LABEL => "sig"
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-- )
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-- port map (
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-- diff_error => sig_diff_error,
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-- diff_errors => sig_diff_errors,
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-- s_i => sig,
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-- s_n_i => sig_n,
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-- rst_errors_i => sig_rst_errors
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-- );
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-- );
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end package pltbutils_comp_pkg;
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end package pltbutils_comp_pkg;
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