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[/] [pltbutils/] [trunk/] [src/] [vhdl/] [pltbutils_comp_pkg.vhd] - Diff between revs 2 and 8

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Rev 2 Rev 8
Line 56... Line 56...
 
 
  -- See pltbutils_comp.vhd for a description of the components.
  -- See pltbutils_comp.vhd for a description of the components.
 
 
  component pltbutils_clkgen is
  component pltbutils_clkgen is
    generic (
    generic (
      G_PERIOD        : time := 10 ns
      G_PERIOD        : time := 10 ns;
 
      G_INITVALUE     : std_logic := '0'
    );
    );
    port (
    port (
      clk_o           : out std_logic;
      clk_o           : out std_logic;
 
      clk_n_o         : out std_logic;
      stop_sim_i      : in  std_logic
      stop_sim_i      : in  std_logic
    );
    );
  end component pltbutils_clkgen;
  end component pltbutils_clkgen;
 
 
  -- Instansiation template 
  -- Instansiation template 
  -- (copy to your own file and remove the comment characters):
  -- (copy to your own file and remove the comment characters):
  --pltbutils_clkgen0 : pltbutils_clkgen
  --pltbutils_clkgen0 : pltbutils_clkgen
  --  generic map (
  --  generic map (
  --    G_PERIOD        => G_PERIOD
  --    G_PERIOD        => G_PERIOD,
 
  --    G_INITVALUE     => '0'
  --  )
  --  )
  --  port map (
  --  port map (
  --    clk_o           => clk,
  --    clk_o           => clk,
 
  --    clk_n_o         => clk_n,
  --    stop_sim_i      => stop_sim
  --    stop_sim_i      => stop_sim
  --  );
  --  );
 
 
end package pltbutils_comp_pkg;
end package pltbutils_comp_pkg;
 
 

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