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https://opencores.org/ocsvn/potato/potato/trunk
[/] [potato/] [trunk/] [benchmarks/] [potato.h] - Diff between revs 24 and 45
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| Rev 24 |
Rev 45 |
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Line 50... |
#define potato_enable_interrupts() asm volatile("csrsi %[status], 1 << %[ei_bit]\n" \
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#define potato_enable_interrupts() asm volatile("csrsi %[status], 1 << %[ei_bit]\n" \
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:: [status] "i" (CSR_STATUS), [ei_bit] "i" (STATUS_EI))
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:: [status] "i" (CSR_STATUS), [ei_bit] "i" (STATUS_EI))
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#define potato_disable_interrupts() asm volatile("csrci %[status], 1 << %[ei_bit] | 1 << %[pei_bit]\n" \
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#define potato_disable_interrupts() asm volatile("csrci %[status], 1 << %[ei_bit] | 1 << %[pei_bit]\n" \
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:: [status] "i" (CSR_STATUS), [ei_bit] "i" (STATUS_EI), [pei_bit] "i" (STATUS_PEI))
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:: [status] "i" (CSR_STATUS), [ei_bit] "i" (STATUS_EI), [pei_bit] "i" (STATUS_PEI))
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#define potato_write_host(data) \
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do { \
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register uint32_t temp = data; \
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asm volatile("csrw %[tohost], %[temp]\n" \
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:: [tohost] "i" (CSR_TOHOST), [temp] "r" (temp)); \
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} while(0);
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#define potato_enable_irq(n) \
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#define potato_enable_irq(n) \
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do { \
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do { \
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register uint32_t temp = 0; \
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register uint32_t temp = 0; \
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asm volatile( \
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asm volatile( \
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"li %[temp], 1 << %[shift]\n" \
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"li %[temp], 1 << %[shift]\n" \
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