OpenCores
URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] [potato/] [trunk/] [example/] [README] - Diff between revs 12 and 21

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 12 Rev 21
Line 15... Line 15...
it into the design, name it "clock_generator". Choose the following options:
it into the design, name it "clock_generator". Choose the following options:
 
 
* Frequency Synthesis
* Frequency Synthesis
* Safe Clock Startup
* Safe Clock Startup
 
 
Set up two output clocks, `clk_out1` with frequency 50 MHz, and `clk_out2` with
Set up two output clocks, `clk_out1` with frequency 60 MHz, and `clk_out2` with
a frequency of 10 MHz. Rename the corresponding ports to `system_clk` and
a frequency of 10 MHz. Rename the corresponding ports to `system_clk` and
`timer_clk` respectively. Name the input clock `clk`.
`timer_clk` respectively. Name the input clock `clk`.
 
 
### Instruction memory
### Instruction memory
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.