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https://opencores.org/ocsvn/product_code_iterative_decoder/product_code_iterative_decoder/trunk
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# $Id: README,v 1.1.1.1 2005-11-15 01:51:25 arif_endro Exp $
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Directory Layout
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.
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|-- bench -> the test bench directory
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|-- data -> data files, e.g. senddata.txt, rxin100DB.txt, start.txt
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|-- doc -> documentation files
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`-- source -> the VHDL source of this project.
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Test Bench
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If you want to run the test bench, then go to the bench subdirectory and
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then run the modelsim do file, i.e. `modelsim_bench.do'. This simulation
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will generate an output into a file called `send_out.txt', then you can
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compare this file with the original informations, i.e. `senddata.txt',
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but first you must discard the first 12 lines before starting the
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comparation. This comparation can be done automatically by running
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script `analyze.sh' on the bench subdirectory.
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Sincerely,
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Arif E. Nugroho
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