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[/] [ps2/] [tags/] [asyst_2/] [rtl/] [verilog/] [ps2_mouse.v] - Diff between revs 25 and 29
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| Rev 25 |
Rev 29 |
| Line 196... |
Line 196... |
reg tx_error_no_ack;
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reg tx_error_no_ack;
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// Internal signal declarations
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// Internal signal declarations
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wire timer_60usec_done;
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wire timer_60usec_done;
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wire timer_5usec_done;
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wire timer_5usec_done;
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reg timer_done ;
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reg timer_5usec ;
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// NOTE: These two signals used to be one. They
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// NOTE: These two signals used to be one. They
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// were split into two signals because of
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// were split into two signals because of
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// shift key trapping. With shift key
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// shift key trapping. With shift key
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// trapping, no event is generated externally,
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// trapping, no event is generated externally,
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// but the "hold" data must still be cleared
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// but the "hold" data must still be cleared
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