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[/] [ps2/] [tags/] [rel_6/] [bench/] [verilog/] [ps2_test_bench.v] - Diff between revs 2 and 5
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1.1.1 2002/02/18 16:16:55 mihad
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// Initial project import - working
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//
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//
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//
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`include "timescale.v"
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`include "timescale.v"
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`include "ps2_testbench_defines.v"
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`include "ps2_testbench_defines.v"
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`include "ps2_defines.v"
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`include "ps2_defines.v"
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$display("Time %t", $time) ;
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$display("Time %t", $time) ;
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$display("Error! Character read from controler not as expected!") ;
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$display("Error! Character read from controler not as expected!") ;
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end
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end
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end
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end
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join
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join
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// do D2 command, that copies parameter in input buffer to output buffer
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kbd_write( `KBD_CNTL_REG, 32'hD2, ok_controler ) ;
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if ( ok_controler !== 1 )
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disable main ;
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kbd_write(`KBD_DATA_REG, 32'h5555_5555, ok_controler) ;
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if ( ok_controler !== 1 )
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disable main ;
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return_scan_code_on_irq( data, ok_controler ) ;
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if ( ok_controler !== 1 )
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disable main ;
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if ( data !== 8'h55 )
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begin
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$display("Error! D2 command doesn't work properly") ;
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end
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end
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end
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endtask // test_keyboard_inhibit
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endtask // test_keyboard_inhibit
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task test_print_screen_and_pause_scancodes ;
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task test_print_screen_and_pause_scancodes ;
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reg ok ;
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reg ok ;
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