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https://opencores.org/ocsvn/ps2_host_controller/ps2_host_controller/trunk
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Rev 3 |
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Line 46... |
input wire ps2_clk_posedge,
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input wire ps2_clk_posedge,
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input wire ps2_clk_negedge,
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input wire ps2_clk_negedge,
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output wire watchdog_rst
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output wire watchdog_rst
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);
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);
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wire ps2_clk_edge = ps2_clk_posedge | ps2_clk_negedge;
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reg watchdog_active;
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always @(posedge sys_clk)
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begin
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if (sys_rst | watchdog_rst | ~(watchdog_active | ps2_clk_edge)) begin
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watchdog_active = 0;
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end
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else begin
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watchdog_active = 1;
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end
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end
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reg [`T_200_MICROSECONDS_SIZE - 1:0] watchdog_timer;
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reg [`T_200_MICROSECONDS_SIZE - 1:0] watchdog_timer;
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always @(posedge sys_clk)
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always @(posedge sys_clk)
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begin
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begin
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if (sys_rst | watchdog_rst | ps2_clk_posedge | ps2_clk_negedge) begin
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if (sys_rst | watchdog_rst | ~watchdog_active | ps2_clk_edge) begin
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watchdog_timer <= `T_200_MICROSECONDS;
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watchdog_timer <= `T_200_MICROSECONDS;
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end
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end
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else begin
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else begin
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watchdog_timer <= watchdog_timer - 1;
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watchdog_timer <= watchdog_timer - 1;
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end
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end
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