URL https://opencores.org/ocsvn/pss/pss/trunk

Subversion Repositories pss

[/] [pss/] [trunk/] [pss/] [hdl/] [pss/] [zpu_uc/] [motherblock/] [pss_motherblock.v] - Diff between revs 5 and 7

Rev 5	Rev 7
Line 36...	Line 36...

`module PSS_MotherBlock`	`module PSS_MotherBlock`
`#(`	`#(`
`parameter A31_DEFAULT = 1,`	`parameter A31_DEFAULT = 1,`
`parameter CPU_RESET_DEFAULT = 1,`	`parameter CPU_RESET_DEFAULT = 1,`
	`parameter EXT_RESET_DEFAULT = 1,`
`parameter MEM_SIZE_KB = 1`	`parameter MEM_SIZE_KB = 1`
`)`	`)`
`(`	`(`
`input clk_i,`	`input clk_i,`

Line 267...	Line 268...


`PSS_SFR`	`PSS_SFR`
`#(`	`#(`
`.CPU_RESET_DEFAULT(CPU_RESET_DEFAULT),`	`.CPU_RESET_DEFAULT(CPU_RESET_DEFAULT),`
	`.EXT_RESET_DEFAULT(EXT_RESET_DEFAULT),`
`.A31_DEFAULT(A31_DEFAULT),`	`.A31_DEFAULT(A31_DEFAULT),`
`.MEM_SIZE_KB(MEM_SIZE_KB)`	`.MEM_SIZE_KB(MEM_SIZE_KB)`
`)`	`)`
`SFR`	`SFR`
`(`	`(`
Line 291...	Line 293...

`.trap_cpu_enb_i(cpu_enb_i),`	`.trap_cpu_enb_i(cpu_enb_i),`
`.trap_cpu_addr_bi(cpu_addr_bi),`	`.trap_cpu_addr_bi(cpu_addr_bi),`

`.cpu_reset_o(cpu_reset_o),`	`.cpu_reset_o(cpu_reset_o),`
	`.ext_reset_o(ext_rst_o),`
`.a31_o(a31),`	`.a31_o(a31),`

`.bus_error_i(bus_error),`	`.bus_error_i(bus_error),`
`.bus_error_addr_bi(bus_error_addr),`	`.bus_error_addr_bi(bus_error_addr),`