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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: eqspiflashsim.h
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// Filename: eqspiflashsim.h
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//
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//
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// Project: OpenArty, an entirely open SoC based upon the Arty platform
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// Project: Wishbone Controlled Quad SPI Flash Controller
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//
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//
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// Purpose: This library simulates the operation of an Extended Quad-SPI
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// Purpose: This library simulates the operation of an Extended Quad-SPI
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// commanded flash, such as the N25Q128A used on the Arty
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// commanded flash, such as the N25Q128A used on the Arty
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// development board by Digilent. As such, it is defined by
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// development board by Digilent. As such, it is defined by
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// 16 MBytes of memory (4 MWords).
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// 16 MBytes of memory (4 MWords).
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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// Copyright (C) 2015,2017, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory. Run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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EQSPIF_RDLOCK,
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EQSPIF_RDLOCK,
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EQSPIF_WRLOCK,
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EQSPIF_WRLOCK,
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EQSPIF_RDID,
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EQSPIF_RDID,
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EQSPIF_RELEASE,
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EQSPIF_RELEASE,
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EQSPIF_FAST_READ,
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EQSPIF_FAST_READ,
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EQSPIF_QUAD_READ_CMD,
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EQSPIF_QUAD_OREAD_CMD,
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EQSPIF_QUAD_IOREAD_CMD,
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EQSPIF_QUAD_READ,
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EQSPIF_QUAD_READ,
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EQSPIF_PP,
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EQSPIF_PP,
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EQSPIF_QPP,
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EQSPIF_QPP,
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// Erase states
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// Erase states
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EQSPIF_SUBSECTOR_ERASE,
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EQSPIF_SUBSECTOR_ERASE,
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EQSPIF_STATE m_state;
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EQSPIF_STATE m_state;
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char *m_mem, *m_pmem, *m_otp, *m_lockregs;
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char *m_mem, *m_pmem, *m_otp, *m_lockregs;
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int m_last_sck;
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int m_last_sck;
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unsigned m_write_count, m_ireg, m_oreg, m_sreg, m_addr,
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unsigned m_write_count, m_ireg, m_oreg, m_sreg, m_addr,
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m_count, m_vconfig, m_mode_byte, m_creg,
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m_count, m_vconfig, m_mode_byte, m_creg, m_membytes,
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m_nvconfig, m_evconfig, m_flagreg, m_nxtout[4];
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m_memmask, m_nvconfig, m_evconfig, m_flagreg, m_nxtout[4];
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bool m_quad_mode, m_debug, m_otp_wp;
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bool mode, m_debug, m_otp_wp;
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typedef enum {
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EQSPIF_QMODE_SPI = 0,
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EQSPIF_QMODE_QSPI_ADDR,
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EQSPIF_QMODE_SPI_ADDR
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} QUAD_MODE;
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QUAD_MODE m_quad_mode;
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public:
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public:
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EQSPIFLASHSIM(void);
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EQSPIFLASHSIM(const int lglen = 24, bool debug = false);
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void load(const char *fname) { load(0, fname); }
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void load(const char *fname) { load(0, fname); }
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void load(const unsigned addr, const char *fname);
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void load(const unsigned addr, const char *fname);
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void load(const uint32_t offset, const char *data, const uint32_t len);
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void debug(const bool dbg) { m_debug = dbg; }
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void debug(const bool dbg) { m_debug = dbg; }
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bool debug(void) const { return m_debug; }
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bool debug(void) const { return m_debug; }
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bool write_enabled(void) const { return m_debug; }
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bool write_enabled(void) const { return m_debug; }
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unsigned counts_till_idle(void) const {
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unsigned counts_till_idle(void) const {
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return m_write_count; }
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return m_write_count; }
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