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[/] [raptor64/] [trunk/] [rtl/] [verilog/] [Raptor64_tb.v] - Diff between revs 29 and 33

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Rev 29 Rev 33
Line 3... Line 3... 
parameter DOCMD = 8'd2;
 
parameter DOCMD = 8'd2;
 
 
 
 
 
reg clk;
 
reg clk;
 
reg rst;
 
reg rst;
 
reg nmi;
 
reg nmi;
 
 
 
wire sys_iocyc;
 
wire sys_cyc;
 
wire sys_cyc;
 
wire sys_stb;
 
wire sys_stb;
 
wire sys_we;
 
wire sys_we;
 
wire [7:0] sys_sel;
 
wire [7:0] sys_sel;
 
wire [63:0] sys_adr;
 
wire [63:0] sys_adr;
Line 28... Line 29... 
wire [15:0] pic_dato;
 
wire [15:0] pic_dato;
 
wire tc_ack;
 
wire tc_ack;
 
wire pic_ack;
 
wire pic_ack;
 
reg pulse1000Hz;
 
reg pulse1000Hz;
 
 
 
 
 
wire uart_ack = sys_cyc && sys_stb && (sys_adr[63:8]==56'hFFFF_FFFF_FFDC_0A);
 
wire uart_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_0A);
 
wire rast_ack = sys_cyc && sys_stb && (sys_adr[63:8]==56'hFFFF_FFFF_FFDA_01);
 
wire rast_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDA_01);
 
 
 
wire AC97_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_10);
 
 
 
wire spr_ack =  sys_iocyc && sys_stb && (sys_adr[23:16]==8'hD8);
 
 
 
wire Led_ack =  sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_06);
 
 
 
 
 
assign ram_ack = sys_cyc && sys_stb && (sys_adr[63:32]==32'd1);
 
assign ram_ack = sys_cyc && sys_stb && (sys_adr[63:32]==32'd1);
 
assign sys_ack = br_ack|stk_ack|scr_ack|tc_ack|pic_ack|ram_ack|uart_ack|rast_ack;
 
assign sys_ack = br_ack|stk_ack|scr_ack|tc_ack|pic_ack|ram_ack|uart_ack|rast_ack|AC97_ack|spr_ack|Led_ack;
 
 
 
 
 
initial begin
 
initial begin
 
        clk = 1;
 
        clk = 1;
 
        pulse1000Hz = 0;
 
        pulse1000Hz = 0;
 
        rst = 0;
 
        rst = 0;
 
        nmi = 0;
 
        nmi = 0;
 
        #100 rst = 1;
 
        #100 rst = 1;
 
        #100 rst = 0;
 
        #100 rst = 0;
 
        #800 nmi = 1;
 
        #800 nmi = 1;
 
        #100 nmi = 0;
 
        #100 nmi = 0;
 
        #500000 pulse1000Hz = 1;
 
 
 
        #10 pulse1000Hz = 0;
 
 
 
end
 
end
 
 
 
 
 
always #10 clk = ~clk;  //  50 MHz
 
always #10 clk = ~clk;  //  50 MHz
 
 
 
always #290930 pulse1000Hz = 1;
 
 
 
always #130 pulse1000Hz = 0;
 
 
 
 
 
 
 
 
 
reg pulse1000HzB;
 
reg pulse1000HzB;
 
always @(posedge clk)
 
always @(posedge clk)
 
if (rst) begin
 
if (rst) begin
Line 69... Line 73... 
 
 
 
 
rtfTextController tc1
 
rtfTextController tc1
 
(
 
(
 
        .rst_i(rst),
 
        .rst_i(rst),
 
        .clk_i(clk),
 
        .clk_i(clk),
 
        .cyc_i(sys_cyc),
 
        .cyc_i(sys_iocyc),
 
        .stb_i(sys_stb),
 
        .stb_i(sys_stb),
 
        .ack_o(tc_ack),
 
        .ack_o(tc_ack),
 
        .we_i(sys_we),
 
        .we_i(sys_we),
 
        .sel_i(sys_sel[1:0]|sys_sel[3:2]|sys_sel[5:4]|sys_sel[7:6]),
 
        .sel_i(sys_sel[1:0]|sys_sel[3:2]|sys_sel[5:4]|sys_sel[7:6]),
 
        .adr_i(sys_adr),
 
        .adr_i(sys_adr),
Line 128... Line 132... 
 
 
 
 
RaptorPIC u_pic
 
RaptorPIC u_pic
 
(
 
(
 
        .rst_i(rst),            // reset
 
        .rst_i(rst),            // reset
 
        .clk_i(clk),    // system clock
 
        .clk_i(clk),    // system clock
 
        .cyc_i(sys_cyc),        // cycle valid
 
        .cyc_i(sys_iocyc),      // cycle valid
 
        .stb_i(sys_stb),        // strobe
 
        .stb_i(sys_stb),        // strobe
 
        .ack_o(pic_ack),        // transfer acknowledge
 
        .ack_o(pic_ack),        // transfer acknowledge
 
        .we_i(sys_we),          // write
 
        .we_i(sys_we),          // write
 
        .sel_i(sys_sel[1:0]|sys_sel[3:2]|sys_sel[5:4]|sys_sel[7:6]),                     // byte select
 
        .sel_i(sys_sel[1:0]|sys_sel[3:2]|sys_sel[5:4]|sys_sel[7:6]),                     // byte select
 
        .adr_i(sys_adr),        // address
 
        .adr_i(sys_adr),        // address
Line 152... Line 156... 
 
 
 
 
 
 
 
 
 
 
 
 
reg [63:0] keybdout;
 
reg [63:0] keybdout;
 
always @(sys_adr)
 
always @(sys_adr)
 
        if (sys_adr==64'hFFFF_FFFF_FFDC_0000) begin
 
        if (sys_adr==24'hDC_0000) begin
 
                $display ("keyboard=FF");
 
                $display ("keyboard=FF");
 
                keybdout <= 64'hFFFF_FFFF_FFFF_FFFF;
 
                keybdout <= 64'hFFFF_FFFF_FFFF_FFFF;
 
        end
 
        end
 
        else
 
        else
 
                keybdout <= 64'd0;
 
                keybdout <= 64'd0;
Line 810... Line 814... 
        .clk_i(clk),
 
        .clk_i(clk),
 
        .nmi_i(cpu_nmi),
 
        .nmi_i(cpu_nmi),
 
        .irq_i(cpu_irq),
 
        .irq_i(cpu_irq),
 
        .bte_o(),
 
        .bte_o(),
 
        .cti_o(),
 
        .cti_o(),
 
 
 
        .iocyc_o(sys_iocyc),
 
        .cyc_o(sys_cyc),
 
        .cyc_o(sys_cyc),
 
        .stb_o(sys_stb),
 
        .stb_o(sys_stb),
 
        .ack_i(sys_ack),
 
        .ack_i(sys_ack),
 
        .err_i(sys_err),
 
        .err_i(sys_err),
 
        .we_o(sys_we),
 
        .we_o(sys_we),

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