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[/] [raptor64/] [trunk/] [rtl/] [verilog/] [lib/] [math/] [BCDMath.v] - Diff between revs 3 and 41

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Line 1... Line 1...
 
`timescale 1ns / 1ps
 
//=============================================================================
 
//        __
 
//   \\__/ o\    (C) 2012  Robert Finch
 
//    \  __ /    All rights reserved.
 
//     \/_//     robfinch<remove>@opencores.org
 
//       ||
 
//  
 
//      BCDMath.v
 
//
 
//  
 
// This source file is free software: you can redistribute it and/or modify 
 
// it under the terms of the GNU Lesser General Public License as published 
 
// by the Free Software Foundation, either version 3 of the License, or     
 
// (at your option) any later version.                                      
 
//                                                                          
 
// This source file is distributed in the hope that it will be useful,      
 
// but WITHOUT ANY WARRANTY; without even the implied warranty of           
 
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
 
// GNU General Public License for more details.                             
 
//                                                                          
 
// You should have received a copy of the GNU General Public License        
 
// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
 
//                                                                          
 
//
 
//=============================================================================
 
//
module BCDAdd(ci,a,b,o,c);
module BCDAdd(ci,a,b,o,c);
input ci;               // carry input
input ci;               // carry input
input [7:0] a;
input [7:0] a;
input [7:0] b;
input [7:0] b;
output [7:0] o;
output [7:0] o;
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5'hE: begin o = 4'h4; c = 1'b1; end
5'hE: begin o = 4'h4; c = 1'b1; end
5'hF: begin o = 4'h5; c = 1'b1; end
5'hF: begin o = 4'h5; c = 1'b1; end
5'h10:  begin o = 4'h6; c = 1'b1; end
5'h10:  begin o = 4'h6; c = 1'b1; end
5'h11:  begin o = 4'h7; c = 1'b1; end
5'h11:  begin o = 4'h7; c = 1'b1; end
5'h12:  begin o = 4'h8; c = 1'b1; end
5'h12:  begin o = 4'h8; c = 1'b1; end
 
5'h13:  begin o = 4'h9; c = 1'b1; end
default:        begin o = 4'h9; c = 1'b1; end
default:        begin o = 4'h9; c = 1'b1; end
endcase
endcase
endmodule
endmodule
 
 
module BCDSubAdjust(i,o,c);
module BCDSubAdjust(i,o,c);
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5'h5: begin o = 4'h5; c = 1'b0; end
5'h5: begin o = 4'h5; c = 1'b0; end
5'h6: begin o = 4'h6; c = 1'b0; end
5'h6: begin o = 4'h6; c = 1'b0; end
5'h7: begin o = 4'h7; c = 1'b0; end
5'h7: begin o = 4'h7; c = 1'b0; end
5'h8: begin o = 4'h8; c = 1'b0; end
5'h8: begin o = 4'h8; c = 1'b0; end
5'h9: begin o = 4'h9; c = 1'b0; end
5'h9: begin o = 4'h9; c = 1'b0; end
 
5'h16: begin 0 = 4'h0; c = 1'b1; end
5'h17: begin o = 4'h1; c = 1'b1; end
5'h17: begin o = 4'h1; c = 1'b1; end
5'h18: begin o = 4'h2; c = 1'b1; end
5'h18: begin o = 4'h2; c = 1'b1; end
5'h19: begin o = 4'h3; c = 1'b1; end
5'h19: begin o = 4'h3; c = 1'b1; end
5'h1A: begin o = 4'h4; c = 1'b1; end
5'h1A: begin o = 4'h4; c = 1'b1; end
5'h1B: begin o = 4'h5; c = 1'b1; end
5'h1B: begin o = 4'h5; c = 1'b1; end

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