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[/] [raytrac/] [branches/] [fp/] [arithblock.vhd] - Diff between revs 153 and 158

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Rev 153 Rev 158
Line 31... Line 31...
                clk     : in std_logic;
                clk     : in std_logic;
                rst : in std_logic;
                rst : in std_logic;
 
 
                dpc : in std_logic;
                dpc : in std_logic;
 
 
                f       : in std_logic_vector (12*32-1 downto 0);
                f       : in vectorblock12;
                a       : in std_logic_vector (8*32-1 downto 0);
                a       : in vectorblock08;
 
 
                s       : out std_logic_vector (4*32-1 downto 0);
                s       : out vectorblock04;
                p       : out std_logic_vector (6*32-1 downto 0)
                p       : out vectorblock06
 
 
        );
        );
end entity;
end entity;
 
 
architecture arithblock_arch of arithblock is
architecture arithblock_arch of arithblock is
Line 74... Line 74...
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        adder_i_0 : fadd32
        adder_i_0 : fadd32
        port map (
        port map (
                clk => clk,
                clk => clk,
                dpc => dpc,
                dpc => dpc,
                a32 => a( 31    downto 0),
                a32 => a(0),
                b32 => a( 63    downto 32),
                b32 => a(1),
                c32 => s( 31    downto 0)
                c32 => s(0)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        adder_i_1 : fadd32
        adder_i_1 : fadd32
        port map (
        port map (
                clk => clk,
                clk => clk,
                dpc => dpc,
                dpc => dpc,
                a32 => a( 95    downto 64),
                a32 => a(2),
                b32 => a( 127   downto 96),
                b32 => a(3),
                c32 => s( 63    downto 32)
                c32 => s(1)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        adder_i_2 : fadd32
        adder_i_2 : fadd32
        port map (
        port map (
                clk => clk,
                clk => clk,
                dpc => dpc,
                dpc => dpc,
                a32 => a( 159   downto 128),
                a32 => a(4),
                b32 => a( 191   downto 160),
                b32 => a(5),
                c32 => s( 95    downto 64)
                c32 => s(2)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        adder_i_3 : fadd32
        adder_i_3 : fadd32
        port map (
        port map (
                clk => clk,
                clk => clk,
                dpc => dpc,
                dpc => dpc,
                a32 => a( 223   downto 192),
                a32 => a(6),
                b32 => a( 255   downto 224),
                b32 => a(7),
                c32 => s( 127   downto 96)
                c32 => s(3)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        mul_i_0 : fmul32
        mul_i_0 : fmul32
        port map (
        port map (
                clk => clk,
                clk => clk,
                a32 => f( 31    downto 0),
                a32 => f(0),
                b32 => f( 63    downto 32),
                b32 => f(1),
                p32 => p( 31    downto 0)
                p32 => p(0)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        mul_i_1 : fmul32
        mul_i_1 : fmul32
        port map (
        port map (
                clk => clk,
                clk => clk,
                a32 => f( 95    downto 64),
                a32 => f(2),
                b32 => f( 127   downto 96),
                b32 => f(3),
                p32 => p( 63    downto 32)
                p32 => p(1)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        mul_i_2 : fmul32
        mul_i_2 : fmul32
        port map (
        port map (
                clk => clk,
                clk => clk,
                a32 => f( 159   downto 128),
                a32 => f(4),
                b32 => f( 191   downto 160),
                b32 => f(5),
                p32 => p( 95    downto 64)
                p32 => p(2)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        mul_i_3 : fmul32
        mul_i_3 : fmul32
        port map (
        port map (
                clk => clk,
                clk => clk,
                a32 => f( 223   downto 192),
                a32 => f(6),
                b32 => f( 255   downto 224),
                b32 => f(7),
                p32 => p( 127   downto 96)
                p32 => p(3)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        mul_i_4 : fmul32
        mul_i_4 : fmul32
        port map (
        port map (
                clk => clk,
                clk => clk,
                a32 => f( 287   downto 256),
                a32 => f(8),
                b32 => f( 319   downto 288),
                b32 => f(9),
                p32 => p( 159   downto 128)
                p32 => p(4)
        );
        );
        --!TBXINSTANCESTART
        --!TBXINSTANCESTART
        mul_i_5 : fmul32
        mul_i_5 : fmul32
        port map (
        port map (
                clk => clk,
                clk => clk,
                a32 => f( 351   downto 320),
                a32 => f(10),
                b32 => f( 383   downto 352),
                b32 => f(11),
                p32 => p( 191   downto 160)
                p32 => p(5)
        );
        );
 
 
 
 
 
 
end architecture;
end architecture;

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