| Line 83... |
Line 83... |
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component fadd32
|
component fadd32
|
port (
|
port (
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clk : in std_logic;
|
clk : in std_logic;
|
dpc : in std_logic;
|
dpc : in std_logic;
|
a32 : in std_logic_vector (31 downto 0);
|
a32 : in xfloat32;
|
b32 : in std_logic_vector (31 downto 0);
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b32 : in xfloat32;
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c32 : out std_logic_vector (31 downto 0)
|
c32 : out xfloat32
|
);
|
);
|
end component;
|
end component;
|
component fmul32
|
component fmul32
|
port (
|
port (
|
clk : in std_logic;
|
clk : in std_logic;
|
a32 : in std_logic_vector (31 downto 0);
|
a32 : in xfloat32;
|
b32 : in std_logic_vector (31 downto 0);
|
b32 : in xfloat32;
|
p32 : out std_logic_vector (31 downto 0)
|
p32 : out xfloat32
|
);
|
);
|
end component;
|
end component;
|
|
|
|
|
--! Contadores para la máquina de estados.
|
--! Contadores para la máquina de estados.
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| Line 243... |
Line 243... |
end component;
|
end component;
|
--! Bloque de memorias
|
--! Bloque de memorias
|
component memblock
|
component memblock
|
generic (
|
generic (
|
blocksize : integer;
|
blocksize : integer;
|
external_writeable_blocks : integer;
|
|
external_readable_blocks : integer;
|
|
external_readable_widthad : integer;
|
external_readable_widthad : integer;
|
external_writeable_widthad : integer
|
external_writeable_widthad : integer
|
);
|
);
|
port (
|
port (
|
|
|
|
|
clk,rst,dpfifo_rd,normfifo_rd,dpfifo_wr,normfifo_wr : in std_logic;
|
clk,rst,dpfifo_rd,normfifo_rd,dpfifo_wr,normfifo_wr : in std_logic;
|
instrfifo_rd : in std_logic;
|
instrfifo_rd : in std_logic;
|
resultfifo_wr: in std_logic_vector(external_readable_blocks-1 downto 0);
|
resultfifo_wr: in std_logic_vector(8-1 downto 0);
|
instrfifo_empty: out std_logic; ext_rd,ext_wr: in std_logic;
|
instrfifo_empty: out std_logic; ext_rd,ext_wr: in std_logic;
|
ext_wr_add : in std_logic_vector(external_writeable_widthad+widthadmemblock-1 downto 0);
|
ext_wr_add : in std_logic_vector(external_writeable_widthad+widthadmemblock-1 downto 0);
|
ext_rd_add : in std_logic_vector(external_readable_widthad-1 downto 0);
|
ext_rd_add : in std_logic_vector(external_readable_widthad-1 downto 0);
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ext_d: in std_logic_vector(floatwidth-1 downto 0);
|
ext_d: in std_logic_vector(floatwidth-1 downto 0);
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int_d : in std_logic_vector(external_readable_blocks*floatwidth-1 downto 0);
|
int_d : in vectorblock08;
|
resultfifo_full : out std_logic_vector(3 downto 0);
|
resultfifo_full : out std_logic_vector(3 downto 0);
|
ext_q,instrfifo_q : out std_logic_vector(floatwidth-1 downto 0);
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ext_q,instrfifo_q : out std_logic_vector(floatwidth-1 downto 0);
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int_q : out std_logic_vector(external_writeable_blocks*floatwidth-1 downto 0);
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int_q : out vectorblock12;
|
int_rd_add : in std_logic_vector(2*widthadmemblock-1 downto 0);
|
int_rd_add : in std_logic_vector(2*widthadmemblock-1 downto 0);
|
dpfifo_d : in std_logic_vector(floatwidth*2-1 downto 0);
|
dpfifo_d : in std_logic_vector(floatwidth*2-1 downto 0);
|
normfifo_d : in std_logic_vector(floatwidth*3-1 downto 0);
|
normfifo_d : in std_logic_vector(floatwidth*3-1 downto 0);
|
dpfifo_q : out std_logic_vector(floatwidth*2-1 downto 0);
|
dpfifo_q : out std_logic_vector(floatwidth*2-1 downto 0);
|
normfifo_q : out std_logic_vector(floatwidth*3-1 downto 0)
|
normfifo_q : out std_logic_vector(floatwidth*3-1 downto 0)
|
| Line 273... |
Line 271... |
end component;
|
end component;
|
--! Bloque decodificacion DataPath Control.
|
--! Bloque decodificacion DataPath Control.
|
component dpc
|
component dpc
|
port (
|
port (
|
clk,rst : in std_logic;
|
clk,rst : in std_logic;
|
paraminput : in std_logic_vector ((12*floatwidth)-1 downto 0); --! Vectores A,B,C,D
|
paraminput : in vectorblock12; --! Vectores A,B,C,D
|
prd32blko : in std_logic_vector ((06*floatwidth)-1 downto 0); --! Salidas de los 6 multiplicadores.
|
prd32blko : in vectorblock06; --! Salidas de los 6 multiplicadores.
|
add32blko : in std_logic_vector ((04*floatwidth)-1 downto 0); --! Salidas de los 4 sumadores.
|
add32blko : in vectorblock04; --! Salidas de los 4 sumadores.
|
sqr32blko,inv32blko : in std_logic_vector (floatwidth-1 downto 0); --! Salidas de la raiz cuadradas y el inversor.
|
sqr32blko,inv32blko : in std_logic_vector (floatwidth-1 downto 0); --! Salidas de la raiz cuadradas y el inversor.
|
fifo32x23_q : in std_logic_vector (03*floatwidth-1 downto 0); --! Salida de la cola intermedia.
|
fifo32x23_q : in std_logic_vector (03*floatwidth-1 downto 0); --! Salida de la cola intermedia.
|
fifo32x09_q : in std_logic_vector (02*floatwidth-1 downto 0); --! Salida de las colas de producto punto.
|
fifo32x09_q : in std_logic_vector (02*floatwidth-1 downto 0); --! Salida de las colas de producto punto.
|
unary,crossprod,addsub : in std_logic; --! Bit con el identificador del bloque AB vs CD e identificador del sub bloque (A/B) o (C/D).
|
unary,crossprod,addsub : in std_logic; --! Bit con el identificador del bloque AB vs CD e identificador del sub bloque (A/B) o (C/D).
|
sync_chain_0 : in std_logic; --! Señal de dato valido que se va por toda la cadena de sincronizacion.
|
sync_chain_0 : in std_logic; --! Señal de dato valido que se va por toda la cadena de sincronizacion.
|
eoi_int : in std_logic; --! Señal de interrupción de final de instrucci&ocaute;n.
|
eoi_int : in std_logic; --! Señal de interrupción de final de instrucci&ocaute;n.
|
eoi_demuxed_int : out std_logic_vector (3 downto 0); --! Señal de interrup&ocaute;n de final de instrucción pero esta vez va asociada a la instruccón UCA.
|
eoi_demuxed_int : out std_logic_vector (3 downto 0); --! Señal de interrup&ocaute;n de final de instrucción pero esta vez va asociada a la instruccón UCA.
|
sqr32blki,inv32blki : out std_logic_vector (floatwidth-1 downto 0); --! Salidas de las 2 raices cuadradas y los 2 inversores.
|
sqr32blki,inv32blki : out std_logic_vector (floatwidth-1 downto 0); --! Salidas de las 2 raices cuadradas y los 2 inversores.
|
fifo32x26_d : out std_logic_vector (03*floatwidth-1 downto 0); --! Entrada a la cola intermedia para la normalización.
|
fifo32x26_d : out std_logic_vector (03*floatwidth-1 downto 0); --! Entrada a la cola intermedia para la normalización.
|
fifo32x09_d : out std_logic_vector (02*floatwidth-1 downto 0); --! Entrada a las colas intermedias del producto punto.
|
fifo32x09_d : out std_logic_vector (02*floatwidth-1 downto 0); --! Entrada a las colas intermedias del producto punto.
|
prd32blki : out std_logic_vector ((12*floatwidth)-1 downto 0); --! Entrada de los 12 factores en el bloque de multiplicación respectivamente.
|
prd32blki : out vectorblock12; --! Entrada de los 12 factores en el bloque de multiplicación respectivamente.
|
add32blki : out std_logic_vector ((08*floatwidth)-1 downto 0); --! Entrada de los 8 sumandos del bloque de 4 sumadores.
|
add32blki : out vectorblock08; --! Entrada de los 8 sumandos del bloque de 4 sumadores.
|
resw : out std_logic_vector (4 downto 0); --! Salidas de escritura y lectura en las colas de resultados.
|
resw : out std_logic_vector (4 downto 0); --! Salidas de escritura y lectura en las colas de resultados.
|
fifo32x09_w : out std_logic;
|
fifo32x09_w : out std_logic;
|
fifo32x23_w,fifo32x09_r : out std_logic;
|
fifo32x23_w,fifo32x09_r : out std_logic;
|
fifo32x23_r : out std_logic;
|
fifo32x23_r : out std_logic;
|
resf_vector : in std_logic_vector(3 downto 0); --! Entradas de la señal de full de las colas de resultados.
|
resf_vector : in std_logic_vector(3 downto 0); --! Entradas de la señal de full de las colas de resultados.
|
resf_event : out std_logic; --! Salida decodificada que indica que la cola de resultados de la operación que está en curso.
|
resf_event : out std_logic; --! Salida decodificada que indica que la cola de resultados de la operación que está en curso.
|
resultoutput : out std_logic_vector ((08*floatwidth)-1 downto 0) --! 8 salidas de resultados, pues lo máximo que podrá calcularse por cada clock son 2 vectores.
|
resultoutput : out vectorblock08 --! 8 salidas de resultados, pues lo máximo que podrá calcularse por cada clock son 2 vectores.
|
);
|
);
|
end component;
|
end component;
|
--! Bloque Aritmetico de Sumadores y Multiplicadores (madd)
|
--! Bloque Aritmetico de Sumadores y Multiplicadores (madd)
|
component arithblock
|
component arithblock
|
port (
|
port (
|
| Line 306... |
Line 304... |
clk : in std_logic;
|
clk : in std_logic;
|
rst : in std_logic;
|
rst : in std_logic;
|
|
|
dpc : in std_logic;
|
dpc : in std_logic;
|
|
|
f : in std_logic_vector (12*32-1 downto 0);
|
f : in vectorblock12;
|
a : in std_logic_vector (8*32-1 downto 0);
|
a : in vectorblock08;
|
|
|
s : out std_logic_vector (4*32-1 downto 0);
|
s : out vectorblock04;
|
p : out std_logic_vector (6*32-1 downto 0)
|
p : out vectorblock06
|
|
|
);
|
);
|
end component;
|
end component;
|
--! Bloque de Raiz Cuadrada
|
--! Bloque de Raiz Cuadrada
|
component sqrt32
|
component sqrt32
|
port (
|
port (
|
|
|
clk : in std_logic;
|
clk : in std_logic;
|
rd32: in std_logic_vector(31 downto 0);
|
rd32: in xfloat32;
|
sq32: out std_logic_vector(31 downto 0)
|
sq32: out xfloat32
|
);
|
);
|
end component;
|
end component;
|
--! Bloque de Inversores.
|
--! Bloque de Inversores.
|
component invr32
|
component invr32
|
port (
|
port (
|
|
|
clk : in std_logic;
|
clk : in std_logic;
|
dvd32 : in std_logic_vector(31 downto 0);
|
dvd32 : in xfloat32;
|
qout32 : out std_logic_vector(31 downto 0)
|
qout32 : out xfloat32
|
);
|
);
|
end component;
|
end component;
|
|
|
|
|
|
|
| Line 469... |
Line 467... |
return tmp;
|
return tmp;
|
end function;
|
end function;
|
|
|
function ap_iCtrlState2string(i:iCtrlState) return string is
|
function ap_iCtrlState2string(i:iCtrlState) return string is
|
|
|
variable tmp:string (1 to 1024);
|
variable tmp:string (1 to 9);
|
|
|
begin
|
begin
|
|
|
case i is
|
case i is
|
when WAITING_FOR_AN_EVENT =>
|
when WAITING_FOR_AN_EVENT =>
|
| Line 481... |
Line 479... |
when FIRING_INTERRUPTIONS =>
|
when FIRING_INTERRUPTIONS =>
|
tmp:="FIRE_INTx";
|
tmp:="FIRE_INTx";
|
when SUSPEND =>
|
when SUSPEND =>
|
tmp:="SUSPENDED";
|
tmp:="SUSPENDED";
|
when others =>
|
when others =>
|
tmp:="Pandora Box Opened -- Illegal iCtrlState value";
|
tmp:="ILGL__VAL";
|
end case;
|
end case;
|
|
|
return tmp;
|
return tmp;
|
|
|
end function;
|
end function;
|
| Line 529... |
Line 527... |
|
|
end function;
|
end function;
|
|
|
|
|
function ap_macState2string(s:macState) return string is
|
function ap_macState2string(s:macState) return string is
|
variable tmp:string (1 to 1024);
|
variable tmp:string (1 to 6);
|
begin
|
begin
|
case s is
|
case s is
|
when LOAD_INSTRUCTION =>
|
when LOAD_INSTRUCTION =>
|
tmp:="LD_INS";
|
tmp:="LD_INS";
|
when FLUSH_ARITH_PIPELINE =>
|
when FLUSH_ARITH_PIPELINE =>
|
tmp:="FL_ARP";
|
tmp:="FL_ARP";
|
when EXECUTE_INSTRUCTION =>
|
when EXECUTE_INSTRUCTION =>
|
tmp:="EX_INS";
|
tmp:="EX_INS";
|
when others =>
|
when others =>
|
tmp:="macStateException:HELL_ON_EARTH";
|
tmp:="HEL_ON";
|
end case;
|
end case;
|
return tmp;
|
return tmp;
|
end function;
|
end function;
|
|
|
constant hexchars : string (1 to 16) := "0123456789ABCDEF";
|
constant hexchars : string (1 to 16) := "0123456789ABCDEF";
|
