| Line 53... |
Line 53... |
result : out std_logic_vector ( lpm_widthp-1 downto 0 )
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result : out std_logic_vector ( lpm_widthp-1 downto 0 )
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);
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);
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end component;
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end component;
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--Stage 0 signals
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--Stage 0 signals
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--!TBXSTART:MULT_STAGE0
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signal s0sga,s0sgb,s0zrs,s1sgr,s2sgr:std_logic;
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signal s0sga,s0sgb,s0zrs : std_logic;
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signal s0exa,s0exb,s1exp,s2exp:std_logic_vector(7 downto 0);
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signal s0exp : std_logic_vector(7 downto 0);
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signal s0exp : std_logic_vector(7 downto 0);
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signal s0uma,s0umb:std_logic_vector(22 downto 0);
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signal s0uma,s0umb:std_logic_vector(22 downto 0);
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signal s0ad,s0bc,s1ad,s1bc:std_logic_vector(23 downto 0);
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signal s0ac:std_logic_vector(35 downto 0);
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signal s0ac:std_logic_vector(35 downto 0);
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--!TBXEND
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signal s1sgr,s2sgr:std_logic;
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signal s0exa,s0exb,s1exp,s2exp:std_logic_vector(7 downto 0);
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signal s0ad,s0bc,s1ad,s1bc:std_logic_vector(23 downto 0);
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signal s1ac,s1umu:std_logic_vector(35 downto 0);
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signal s1ac,s1umu:std_logic_vector(35 downto 0);
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signal s2umu:std_logic_vector(24 downto 0);
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signal s2umu:std_logic_vector(24 downto 0);
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signal sxprop : std_logic_vector(2 downto 0);
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signal sxprop : std_logic_vector(2 downto 0);
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