| Line 75... |
Line 75... |
signal s_iq_empty : std_logic;
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signal s_iq_empty : std_logic;
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signal s_iq : std_logic_vector (31 downto 0);
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signal s_iq : std_logic_vector (31 downto 0);
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--! Señales de Memblock -> Interruption Machine
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--! Señales de Memblock -> Interruption Machine
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signal s_rfull_events : std_logic_vector (3 downto 0); --Estas señales tambien entran a DPC.
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signal s_rfull_events : std_logic_vector (3 downto 0); --Estas señales tambien entran a DPC.
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--! Señales de Memblock -> DPC.
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--! Señales de Memblock -> DPC.
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signal s_q : std_logic_vector (12*32-1 downto 0);
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signal s_q : vectorblock12;
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signal s_normfifo_q : std_logic_vector (3*32-1 downto 0);
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signal s_normfifo_q : std_logic_vector (3*32-1 downto 0);
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signal s_dpfifo_q : std_logic_vector (2*32-1 downto 0);
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signal s_dpfifo_q : std_logic_vector (2*32-1 downto 0);
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--!TBXEND
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--!TBXEND
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--!TBXSTART:SQR32
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--!TBXSTART:SQR32
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--!Señales de Bloque de Raíz Cuadrada a DPC
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--!Señales de Bloque de Raíz Cuadrada a DPC
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| Line 103... |
Line 103... |
signal s_dpfifo_w : std_logic;
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signal s_dpfifo_w : std_logic;
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signal s_dpfifo_r : std_logic;
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signal s_dpfifo_r : std_logic;
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signal s_dpfifo_d : std_logic_vector (2*32-1 downto 0);
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signal s_dpfifo_d : std_logic_vector (2*32-1 downto 0);
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signal s_normfifo_w : std_logic;
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signal s_normfifo_w : std_logic;
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signal s_normfifo_r : std_logic;
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signal s_normfifo_r : std_logic;
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signal s_results_d : std_logic_vector (8*32-1 downto 0);
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signal s_results_d : vectorblock08;
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signal s_normfifo_d : std_logic_vector (3*32-1 downto 0);
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signal s_normfifo_d : std_logic_vector (3*32-1 downto 0);
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--!Señales de DPC a Interruption Machine
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--!Señales de DPC a Interruption Machine
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signal s_eoi_events : std_logic_vector (3 downto 0);
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signal s_eoi_events : std_logic_vector (3 downto 0);
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--! Señales de DPC a ArithBlock
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--! Señales de DPC a ArithBlock
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signal s_f : std_logic_vector (12*32-1 downto 0);
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signal s_f : vectorblock12;
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signal s_a : std_logic_vector (8*32-1 downto 0);
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signal s_a : vectorblock08;
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--! Parcialmente las señales de salida de los sumadores van al data path control.
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--! Parcialmente las señales de salida de los sumadores van al data path control.
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signal s_s : std_logic_vector (4*32-1 downto 0);
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signal s_s : vectorblock04;
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signal s_p : std_logic_vector (6*32-1 downto 0);
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signal s_p : vectorblock06;
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--!TBXEND
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--!TBXEND
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--!TBXSTART:IM
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--!TBXSTART:IM
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--! Señales de Interruption Machine al testbench
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--! Señales de Interruption Machine al testbench
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signal s_iCtrlState : iCtrlState;
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signal s_iCtrlState : iCtrlState;
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--!TBXEND
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--!TBXEND
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| Line 131... |
Line 131... |
s_int_rd_add <= s_addb&s_adda;
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s_int_rd_add <= s_addb&s_adda;
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--!TBXINSTANCESTART
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--!TBXINSTANCESTART
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MemoryBlock : memblock
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MemoryBlock : memblock
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generic map (
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generic map (
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blocksize => 512,
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blocksize => 512,
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external_writeable_blocks => 12,
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external_readable_blocks => 8,
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external_readable_widthad => 3,
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external_readable_widthad => 3,
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external_writeable_widthad => 4
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external_writeable_widthad => 4
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)
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)
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port map (
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port map (
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clk => clk,
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clk => clk,
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