| Line 43... |
Line 43... |
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--! datos de entrada
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--! datos de entrada
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d : in std_logic_vector (31 downto 0);
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d : in std_logic_vector (31 downto 0);
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--! Interrupciones
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--! Interrupciones
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int : out std_logic_vector (7 downto 0);
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int07,int06,int05,int04,int03,int02,int01,int00 : out std_logic;
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--! Salidas
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--! Salidas
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q : out std_logic_vector (31 downto 0)
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q : out std_logic_vector (31 downto 0)
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| Line 125... |
Line 125... |
signal s_resultsfifo_w : std_logic_vector (4 downto 0);
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signal s_resultsfifo_w : std_logic_vector (4 downto 0);
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--!TBXSTART:IM
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--!TBXSTART:IM
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--! Señales de Interruption Machine al testbench
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--! Señales de Interruption Machine al testbench
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signal s_iCtrlState : iCtrlState;
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signal s_iCtrlState : iCtrlState;
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signal s_int : std_logic_vector (7 downto 0);
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--!TBXEND
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--!TBXEND
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begin
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begin
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--! Sacar las interrupciones
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int07 <= s_int(7);
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int06 <= s_int(6);
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int05 <= s_int(5);
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int04 <= s_int(4);
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int03 <= s_int(3);
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int02 <= s_int(2);
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int01 <= s_int(1);
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int00 <= s_int(0);
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--! Signo de los bloques de suma
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--! Signo de los bloques de suma
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s_sign <= not(s_dpc_uca(2)) and s_dpc_uca(1);
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s_sign <= not(s_dpc_uca(2)) and s_dpc_uca(1);
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--! Instanciar el bloque de memorias MEMBLOCK
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--! Instanciar el bloque de memorias MEMBLOCK
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s_resultfifo_wr <= s_resultsfifo_w(4)&s_resultsfifo_w(4)&s_resultsfifo_w(4)&s_resultsfifo_w(3)&s_resultsfifo_w(2)&s_resultsfifo_w(1)&s_resultsfifo_w(2)&s_resultsfifo_w(0);
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s_resultfifo_wr <= s_resultsfifo_w(4)&s_resultsfifo_w(4)&s_resultsfifo_w(4)&s_resultsfifo_w(3)&s_resultsfifo_w(2)&s_resultsfifo_w(1)&s_resultsfifo_w(2)&s_resultsfifo_w(0);
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| Line 254... |
Line 263... |
port map (
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port map (
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clk => clk,
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clk => clk,
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rst => rst,
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rst => rst,
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rfull_events => s_rfull_events,
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rfull_events => s_rfull_events,
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eoi_events => s_eoi_events,
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eoi_events => s_eoi_events,
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eoi_int => int(3 downto 0),
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eoi_int => s_int(3 downto 0),
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rfull_int => int(7 downto 4),
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rfull_int => s_int(7 downto 4),
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state => s_iCtrlState
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state => s_iCtrlState
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);
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);
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--!TBXINSTANCEEND
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--!TBXINSTANCEEND
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--!Instanciar la maquina de estados
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--!Instanciar la maquina de estados
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