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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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use work.arithpack.all;
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use work.arithpack.all;
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entity sm is
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entity sm is
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generic (
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width : integer := 32;
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widthadmemblock : integer := 9
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--!external_readable_widthad :
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);
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port (
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port (
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--! Señales normales de secuencia.
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--! Señales normales de secuencia.
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clk,rst: in std_logic;
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clk,rst: in std_logic;
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--! Vector con las instrucción codficada
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--! Vector con las instrucción codficada
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instrQq:in std_logic_vector(width-1 downto 0);
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instrQq:in std_logic_vector(floatwidth-1 downto 0);
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--! Señal de cola vacia.
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--! Señal de cola vacia.
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instrQ_empty:in std_logic;
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instrQ_empty:in std_logic;
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adda,addb:out std_logic_vector (widthadmemblock-1 downto 0);
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adda,addb:out std_logic_vector (widthadmemblock-1 downto 0);
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--! Código UCA, pero en la etapa DPC: La diferencia es que UCA en la etapa DPC, decodifica el datapath dentro del pipeline aritmético.
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--! Código UCA, pero en la etapa DPC: La diferencia es que UCA en la etapa DPC, decodifica el datapath dentro del pipeline aritmético.
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dpc_uca <= s_dpc_uca;
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dpc_uca <= s_dpc_uca;
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--! Bloques asignados en la instrucci´øn
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--! Bloques asignados en la instrucci´øn
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s_block_start_a <= instrQq(width-4 downto width-8);
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s_block_start_a <= instrQq(floatwidth-4 downto floatwidth-8);
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s_block_end_a <= instrQq(width-9 downto width-13);
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s_block_end_a <= instrQq(floatwidth-9 downto floatwidth-13);
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s_block_start_b <= instrQq(width-14 downto width-18);
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s_block_start_b <= instrQq(floatwidth-14 downto floatwidth-18);
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s_block_end_b <= instrQq(width-19 downto width-23);
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s_block_end_b <= instrQq(floatwidth-19 downto floatwidth-23);
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--! Campo que define si la instrucción es combinatoria
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--! Campo que define si la instrucción es combinatoria
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s_combinatory <= instrQq(width-24);
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s_combinatory <= instrQq(floatwidth-24);
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--! Campo que define cuantos clocks debe esperar el sistema, despues de que se ejecuta una instrucción, para que el pipeline aritmético quede vacio.
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--! Campo que define cuantos clocks debe esperar el sistema, despues de que se ejecuta una instrucción, para que el pipeline aritmético quede vacio.
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s_delay_field <= instrQq(width-25 downto width-32);
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s_delay_field <= instrQq(floatwidth-25 downto floatwidth-32);
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--! UCA code, código con la instrucción a ejecutar.
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--! UCA code, código con la instrucción a ejecutar.
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s_instr_uca <= instrQq(31 downto 29);
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s_instr_uca <= instrQq(31 downto 29);
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--! Address Counters
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--! Address Counters
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--!TBXINSTANCESTART
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counterA:customCounter
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counterA:customCounter
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generic map ("YES","NO","NO","YES",4,9)
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generic map (
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port map (clk,rst,s_go_a,s_set_a,s_block_start_a,s_block_end_a,open,s_eb_a,s_eq_a,adda);
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EOBFLAG => "YES",
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ZEROFLAG => "NO",
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BACKWARDS => "NO",
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EQUALFLAG => "YES",
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subwidth => 4,
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width => 9
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)
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port map (
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clk => clk,
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rst => rst,
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go => s_go_a,
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set => s_set_a,
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setValue => s_block_start_a,
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cmpBlockValue => s_block_end_a,
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zero_flag => open,
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eob_flag => s_eb_a,
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eq_flag => s_eq_a,
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count => adda
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);
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--!TBXINSTANCEEND
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--!TBXINSTANCESTART
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counterB:customCounter
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counterB:customCounter
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generic map ("YES","NO","NO","YES",4,9)
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generic map (
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port map (clk,rst,s_go_b,s_set_b,s_block_start_b,s_block_end_b,open,s_eb_b,s_eq_b,addb);
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EOBFLAG => "YES",
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ZEROFLAG => "NO",
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BACKWARDS => "NO",
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EQUALFLAG => "YES",
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subwidth => 4,
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width => 9
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)
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port map (
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clk => clk,
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rst => rst,
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go => s_go_b,
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set => s_set_b,
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setValue => s_block_start_b,
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cmpBlockValue => s_block_end_b,
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zero_flag => open,
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eob_flag => s_eb_b,
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eq_flag => s_eq_b,
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count => addb
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);
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--!TBXINSTANCEEND
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--!TBXINSTANCESTART
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counterDly:customCounter
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counterDly:customCounter
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generic map("NO","YES","YES","NO",0,5)
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generic map(
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port map (clk,rst,s_go_delay,s_set_dly,s_delay_field(4 downto 0),"00000",s_zeroFlag_delay,open,open,open);
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EOBFLAG => "NO",
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ZEROFLAG => "YES",
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BACWARDS => "YES",
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EQUALFLAG => "NO",
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width => 5,
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subwidth => 0
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)
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port map (
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clk => clk,
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rst => rst,
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go => s_go_delay,
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set => s_set_dly,
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setValue => s_delay_field(4 downto 0),
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cmpBlockValue => "00000",
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zero_flag => s_zeroFlag_delay,
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eob_flag => open,
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eq_flag => open,
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count => open
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);
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--!TBXINSTANCEEND
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sm_comb:
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sm_comb:
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process (s_state, full_r,s_eb_b,s_combinatory,s_zeroFlag_delay,s_eq_b,s_eb_a,s_eq_a,instrQ_empty)
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process (s_state, full_r,s_eb_b,s_combinatory,s_zeroFlag_delay,s_eq_b,s_eb_a,s_eq_a,instrQ_empty)
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begin
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begin
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--!Señal de play/pause del contador de direcciones para el parámetro B/D.
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--!Señal de play/pause del contador de direcciones para el parámetro B/D.
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