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https://opencores.org/ocsvn/raytrac/raytrac/trunk
[/] [raytrac/] [trunk/] [arithpack.vhd] - Diff between revs 52 and 59
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| Rev 52 |
Rev 59 |
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Line 208... |
result : out std_logic_vector (width-1 downto 0);
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result : out std_logic_vector (width-1 downto 0);
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cout : out std_logic
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cout : out std_logic
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);
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);
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end component;
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end component;
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--! Entidad raiz cuadrada para enteros de 32 bits. no worries 'jhonny g' aint no thy recepie!.
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--! No es una entidad de aproximaci´on, posee: etapa de decodificaci´ e imparidad;on de direcciones,
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--! etapa de calculo de la raiz cuadrada mediante memoria, etapa:
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component sqrt
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port (
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clk,rst : in std_logic; -- señales de control.
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r : in std_logic_vector (31 downto 0); --radicando
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s : out std_logic_vector (15 downto 0)
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);
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end component;
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--! Procedimiento para escribir std_logic_vectors en formato hexadecimal.
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--! Procedimiento para escribir std_logic_vectors en formato hexadecimal.
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procedure hexwrite_0(l:inout line; h: in std_logic_vector);
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procedure hexwrite_0(l:inout line; h: in std_logic_vector);
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component shifter is
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generic (
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address_width : integer := 9;
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width : integer := 12
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);
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port (
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data : in std_logic_vector(width - 1 downto 0);
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address : out std_logic_vector (address_width-1 downto 0);
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zero : out std_logic;
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maxoneispair : out std_logic
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);
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end component;
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end package;
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end package;
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--! Funciones utilitarias, relacionadas sobre todo con el testbench
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--! Funciones utilitarias, relacionadas sobre todo con el testbench
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package body arithpack is
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package body arithpack is
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