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Subversion Repositories raytrac

[/] [raytrac/] [trunk/] [fpbranch/] [arithpack.vhd] - Diff between revs 82 and 93

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Rev 82 Rev 93
Line 86... Line 86...
        component clock_gen
        component clock_gen
                generic (tclk : time := tclk);
                generic (tclk : time := tclk);
                port    (clk,rst : out std_logic);
                port    (clk,rst : out std_logic);
        end component;
        end component;
 
 
 
 
 
        component sadd3
 
        port (
 
                a,b,c:in std_logic_vector(24 downto 0);
 
                dpc:in std_logic;
 
                res:out std_logic_vector(24 downto 0)
 
        );
 
        end component;
 
 
        --! Ray Trac: Implementacion del Rt Engine
        --! Ray Trac: Implementacion del Rt Engine
        component raytrac
        component raytrac
        generic (
        generic (
                testbench_generation : string := "NO";
                testbench_generation : string := "NO";
                registered : string := "NO" --! Este parametro, por defecto "YES", indica si se registran o cargan en registros los vectores A,B,C,D y los codigos de operacion opcode y addcode en vez de ser conectados directamente al circuito combinatorio. \n This parameter, by default "YES", indicates if vectors A,B,C,D and operation code inputs opcode are to be loaded into a register at the beginning of the pipe rather than just connecting them to the operations decoder (opcoder). 
                registered : string := "NO" --! Este parametro, por defecto "YES", indica si se registran o cargan en registros los vectores A,B,C,D y los codigos de operacion opcode y addcode en vez de ser conectados directamente al circuito combinatorio. \n This parameter, by default "YES", indicates if vectors A,B,C,D and operation code inputs opcode are to be loaded into a register at the beginning of the pipe rather than just connecting them to the operations decoder (opcoder). 

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