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------------------------------------------------
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--! @file ema32x2.vhd
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--! @brief RayTrac Floating Point Adder
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--! @author Julián Andrés Guarín Reyes
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--------------------------------------------------
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-- RAYTRAC (FP BRANCH)
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-- Author Julian Andres Guarin
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-- ema32x2.vhd
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-- This file is part of raytrac.
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--
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-- raytrac is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- raytrac is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with raytrac. If not, see <http://www.gnu.org/licenses/>
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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--! Esta entidad recibe dos números en formato punto flotante IEEE 754, de precision simple y devuelve las mantissas signadas y corridas, y el exponente correspondiente al resultado antes de normalizarlo al formato float.
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--!\nLas 2 mantissas y el exponente entran despues a la entidad add2 que suma las mantissas y entrega el resultado en formato IEEE 754.
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entity fadd32 is
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entity ema32x2 is
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port (
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port (
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clk,dpc : in std_logic;
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a32,b32: in std_logic_vector(31 downto 0);
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a32,b32: in std_logic_vector(31 downto 0);
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dpc,clk:in std_logic;
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c32:out std_logic_vector(31 downto 0)
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c32:out std_logic_vector(31 downto 0)
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);
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);
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end fadd32;
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end ema32x2;
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architecture fadd32_arch of fadd32 is
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architecture ema32x2_arch of ema32x2 is
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component lpm_mult
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component lpm_mult
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generic (
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generic (
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lpm_hint : string;
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lpm_hint : string;
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lpm_representation : string;
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lpm_representation : string;
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Line 54... |
Line 55... |
datab : in std_logic_vector ( lpm_widthb-1 downto 0 );
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datab : in std_logic_vector ( lpm_widthb-1 downto 0 );
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result : out std_logic_vector( lpm_widthp-1 downto 0 )
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result : out std_logic_vector( lpm_widthp-1 downto 0 )
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);
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);
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end component;
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end component;
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signal s0signa,s0signb : std_logic;
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signal s0ea,s0eb: std_logic_vector(7 downto 0);
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signal s1delta : std_logic_vector(5 downto 0);
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signal s0uma,s0umb:std_logic_vector(22 downto 0);
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signal s0delta,s1exp,s2exp,s3exp,s4exp,s5exp,s5factor,s6exp,s6factor: std_logic_vector(7 downto 0);
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signal s1shifter,s5factorhot9 : std_logic_vector(8 downto 0);
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signal s1signa, s1signb: std_logic;
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signal s1pl,s5pl : std_logic_vector(17 downto 0);
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signal s1sdelta,s1expunrm: std_logic_vector(7 downto 0);
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signal s5postshift,s6postshift : std_logic_vector(22 downto 0);
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signal s1udelta,s1xorslab: std_logic_vector(4 downto 0);
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signal s1umantshift,s1umantfixed,s1postshift,s1xorslab,s2xorslab : std_logic_vector(23 downto 0);
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signal s1uma,s1umb:std_logic_vector(22 downto 0);
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signal s2umantshift,s2mantfixed,s3mantfixed,s3mantshift,s4xorslab : std_logic_vector(24 downto 0);
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signal s1factor: std_logic_vector(8 downto 0);
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signal s5factorhot25 : std_logic_vector(24 downto 0);
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signal s4sresult,s5result,s6result : std_logic_vector(25 downto 0); -- Signed mantissa result
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signal s2signa,s2signb,s2bgta : std_logic;
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signal s1ph,s5ph : std_logic_vector(26 downto 0);
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signal s2exp : std_logic_vector(7 downto 0);
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signal s0a,s0b : std_logic_vector(31 downto 0); -- Float 32 bit
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signal s2udelta : std_logic_vector (1 downto 0);
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signal s2um0,s2uma,s2umb,s2smshift : std_logic_vector(22 downto 0);
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signal s2xorslab : std_logic_vector(23 downto 0);
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signal s2factor : std_logic_vector(8 downto 0);
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signal s2psh:std_logic_vector(26 downto 0);
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signal s2psl:std_logic_vector(17 downto 0);
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signal s2asign,s2azero,s2abgta:std_logic;
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signal s2asm0,s2asm1 : std_logic_vector(24 downto 0);
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signal s2asm : std_logic_vector(25 downto 0);
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signal s2aum1 : std_logic_vector(23 downto 0);
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signal s2aexp : std_logic_vector(7 downto 0);
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signal s2audelta : std_logic_vector (1 downto 0);
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signal s2axorslab: std_logic_vector(23 downto 0);
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signal s3sign: std_logic;
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signal s3um,s3xorslab: std_logic_vector(24 downto 0);
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signal s3sm: std_logic_vector(25 downto 0);
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signal s3exp:std_logic_vector(7 downto 0);
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signal s3asign:std_logic;
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signal s3ashift:std_logic_vector(7 downto 0);
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signal s3afactor,s3aexp: std_logic_vector(7 downto 0);
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signal s3aum,s3afactorhot:std_logic_vector(24 downto 0);
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signal s4sign: std_logic;
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signal s4shift: std_logic_vector(7 downto 0);
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signal s4exp: std_logic_vector(7 downto 0);
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signal s4factorhot9: std_logic_vector(8 downto 0);
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signal s4pl: std_logic_vector(17 downto 0);
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signal s4postshift: std_logic_vector(22 downto 0);
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signal s4um,s4factorhot: std_logic_vector(24 downto 0);
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signal s4ph: std_logic_vector(26 downto 0);
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begin
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begin
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--! ******************************************************************************************************************************
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--! Pipeline
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pipeline:
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process(clk)
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process(clk)
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begin
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begin
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if clk'event and clk='1' then
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if clk='1' and clk'event then
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--! Registro de entrada
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--! Registro de entrada
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s0a <= a32;
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s0ea <= a32(30 downto 23);
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s0b(31) <= dpc xor b32(31); --! Importante: Integrar el signo en el operando B
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s0uma <= a32(22 downto 0);
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s0b(30 downto 0) <= b32(30 downto 0);
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s0signa <= a32(31);
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s0eb <= b32(30 downto 23);
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--!Etapa 0,Escoger el mayor exponente que sera el resultado desnormalizado, calcula cuanto debe ser el corrimiento de la mantissa con menor exponente y reorganiza los operandos, si el mayor es b, intercambia las posición si el mayor es a las posiciones la mantiene. Zero check.
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s0umb <= b32(22 downto 0);
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--!signo,exponente,mantissa
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s0signb <= a32(31) xor dpc;
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s1delta <= s0delta(7) & (s0delta(7) xor s0delta(4))&(s0delta(7) xor s0delta(4)) & s0delta(2 downto 0);
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case s0delta(7) is
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--! Etapa 0
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when '1' =>
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--! I3E754ZERO y calculo del delta entre exponentes
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s1exp <= s0b(30 downto 23);
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if s0ea="00" then
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s1umantshift <= s0a(31)&s0a(22 downto 0);
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s1signa <= '0';
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s1umantfixed <= s0b(31)&s0b(22 downto 0);
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else
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s1signa <= s0signa;
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end if;
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if s0eb="00" then
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s1signb <= '0';
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s1expunrm <= s0ea;
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else
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s1signb <= s0signb;
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s1expunrm <= s0eb;
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end if;
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if s0ea=x"00" or s0eb=x"00" then
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s1sdelta <= x"00";
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else
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s1sdelta <= s0ea-s0eb;
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end if;
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--! Buffers
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s1uma <= s0uma;
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s1umb <= s0umb;
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--! Etapa 1
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--! Manejo de exponente, previo a la denormalizacion
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--! Calulo del Factor de corrimiento
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s2exp <= s1expunrm+s1sdelta;
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s2factor <= s1factor;
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--! Otras señales de soporte
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s2signa <= s1signa;
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s2signb <= s1signb;
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s2bgta <= s1sdelta(7);
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s2uma <= s1uma;
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s2umb <= s1umb;
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s2udelta <= s1udelta(4 downto 3);
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--! Etapa 2 Realizar los corrimientos, denormalizacion parcial y signar la mantissa que se queda fija
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--! Mantissa Fija
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s2asm0 <= (s2xorslab(23)&(('1'&s2um0(22 downto 0))xor(s2xorslab)))+(x"000000"&s2xorslab(23));
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--! Mantissa Corrida no signada
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case s2udelta is
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when "00" =>
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s2aum1(23 downto 06) <= s2psh(25 downto 08);
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s2aum1(05 downto 00) <= s2psh(07 downto 02) or (s2psl(16 downto 11));
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when "01" =>
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s2aum1(23 downto 06) <= x"00"&s2psh(25 downto 16);
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s2aum1(05 downto 00) <= s2psh(15 downto 10);
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when "10" =>
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s2aum1(23 downto 06) <= x"0000"&s2psh(25 downto 24);
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s2aum1(05 downto 00) <= s2psh(23 downto 18);
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when others =>
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when others =>
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s2aum1 <= (others => '0');
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s1exp <= s0a(30 downto 23);
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end case;
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s1umantshift <= s0b(31)&s0b(22 downto 0);
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s2asign <= (s2bgta and s2signa) or (not(s2bgta) and s2signb);
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s1umantfixed <= s0a(31)&s0a(22 downto 0);
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--! Exponente normalizado
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end case;
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s2aexp <= s2exp;
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--! Uno de los sumandos es 0.
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--! Etapa 1: Denormalización de la mantissas.
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s2azero <= (not(s2signb)) or (not(s2signa));
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case s0delta(4 downto 3) is
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when "00" => s2umantshift <= s1umantshift(23)&s1postshift(23 downto 0);
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when "01" => s2umantshift <= s1umantshift(23)&x"00"&s1postshift(23 downto 8);
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--! Etapa 2a signar la mantissa corrida y sumarlas con la no corrida
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when "10" => s2umantshift <= s1umantshift(23)&x"0000"&s1postshift(23 downto 16);
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s3sm <= s2asm;
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when others => s2umantshift <= (others => '0');
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s3exp <= s2aexp;
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end case;
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s2mantfixed <= s1umantfixed(23) & ( ( ('1'&s1umantfixed(22 downto 0)) xor s1xorslab) + ( x"00000"&"000"&s1umantfixed(23) ) );
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s2exp <= s1exp;
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--! Etapa 3 quitar el signo a la mantissa.
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s3asign <= s3sign;
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--! Etapa2: Signar la mantissa denormalizada.
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s3aum <= s3um;
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s3mantfixed <= s2mantfixed;
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s3aexp <= s3exp;
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s3mantshift <= s2umantshift(24)& ( ( s2umantshift(23 downto 0) xor s2xorslab) + ( x"00000"&"000"&s2umantshift(24) ) );
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s3exp <= s2exp;
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--! Eatapa 3a calcular el factor de corrimiento para la normalizacion y el delta del exponente.
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--! Etapa 3: Etapa 3 Realizar la suma, quitar el signo de la mantissa y codificar el corrimiento hacia la izquierda.
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s4sign <= s3asign;
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s4sresult <= (s3mantshift(24)&s3mantshift)+(s3mantfixed(24)&s3mantfixed);
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s4exp <= s3aexp;
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s4exp <= s3exp;
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s4shift<= s3ashift;
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s4factorhot <= s3afactorhot;
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--! Etapa 4: Quitar el signo a la mantissa resultante.
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s4um <= s3aum;
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s5result <= s4sresult(25)&((s4sresult(24 downto 0) xor s4xorslab)+(x"000000"&s4sresult(25)));
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s5exp <= s4exp;
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--! Etapa 4 Normalizar la mantissa resultado y renormalizar el exponente. Entregar el resultado!
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c32(31) <= s4sign;
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c32(30 downto 23) <= s4exp-s4shift;
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--! Etapa 5: Codificar el corrimiento para la normalizacion de la mantissa resultante.
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case s4shift(4 downto 3) is
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s6result <= s5result;
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when "01" => c32(22 downto 0) <= x"00"&s4postshift(22 downto 8);
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s6exp <= s5exp;
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when "10" => c32(22 downto 0) <= x"0000"&s4postshift(22 downto 16);
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s6factor <= s5factor;
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when others => c32(22 downto 0) <= s4postshift(22 downto 0);
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s6postshift <= s5postshift;
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--! Etapa 6: Entregar el resultado.
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c32(31) <= s6result(25);
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c32(30 downto 23) <= s6exp+s5factor+x"ff";
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case s6factor(4 downto 3) is
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when "01" => c32(22 downto 0) <= s6postshift(14 downto 00)&x"00";
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when "10" => c32(22 downto 0) <= s6postshift(06 downto 00)&x"0000";
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when others => c32(22 downto 0) <= s6postshift;
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end case;
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end case;
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end if;
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end if;
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end process;
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end process;
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--! Combinatorial gremlin, Etapa 0 el corrimiento de la mantissa con menor exponente y reorganiza los operandos,\n
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--! ******************************************************************************************************************************
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--! si el mayor es b, intercambia las posición si el mayor es a las posiciones la mantiene.
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s0delta <= s0a(30 downto 23)-s0b(30 downto 23);
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--! Etapa 1
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--! Combinatorial Gremlin, Etapa 1 Codificar el factor de corrimiento de denormalizacion y denormalizar la mantissa no fija. Signar la mantissa que se queda fija.
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--! Decodificar la magnitud del corrimiento
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decodeshiftfactor:
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decodermag:
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process (s1delta(2 downto 0))
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process (s1udelta(7), s1udelta(4 downto 0))
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begin
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begin
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case s1delta(2 downto 0) is
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s1xorslab <= (others => s1sdelta(7));
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when "111" => s1shifter(8 downto 0) <= '0'&s1delta(5)&"00000"¬(s1delta(5))&'0';
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s1udelta <= (s1sdelta(4 downto 0) xor s1xorslab)+(x"0"&s1sdelta(7));
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when "110" => s1shifter(8 downto 0) <= "00"&s1delta(5)&"000"¬(s1delta(5))&"00";
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end process;
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when "101" => s1shifter(8 downto 0) <= "000"&s1delta(5)&'0'¬(s1delta(5))&"000";
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when "100" => s1shifter(8 downto 0) <= '0'&x"10";
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--! Decodificar el factor de corrimiento
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when "011" => s1shifter(8 downto 0) <= "000"¬(s1delta(5))&'0'&s1delta(5)&"000";
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denormfactor:
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when "010" => s1shifter(8 downto 0) <= "00"¬(s1delta(5))&"000"&s1delta(5)&"00";
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process (s1udelta(2 downto 0),s1sdelta(7))
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when "001" => s1shifter(8 downto 0) <= '0'¬(s1delta(5))&"00000"&s1delta(5)&'0';
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begin
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when others => s1shifter(8 downto 0) <= not(s1delta(5))&"0000000"&s1delta(5);
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s1factor(8 downto 0) <= (others => s1sdelta(7));
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case s1udelta(2 downto 0) is
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when "000" => s1factor(8 downto 0) <= "100000000";
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when "001" => s1factor(8 downto 0) <= "010000000";
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when "010" => s1factor(8 downto 0) <= "001000000";
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when "011" => s1factor(8 downto 0) <= "000100000";
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when "100" => s1factor(8 downto 0) <= "000010000";
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when "101" => s1factor(8 downto 0) <= "000001000";
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when "110" => s1factor(8 downto 0) <= "000000100";
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when others => s1factor(8 downto 0) <= "000000010";
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end case;
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end process;
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--! ******************************************************************************************************************************
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--! Etapa2
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--! Correr las mantissas
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denomrselectmantissa2shift:
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process (s2bgta,s2signa,s2signb,s2uma,s2umb)
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begin
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case s2bgta is
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when '1' => -- Negativo b>a : se corre a delta espacios a la derecha y b se queda quieto
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s2um0 <= s2umb;
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s2xorslab <= (others => s2signb);
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s2smshift <= s2uma;
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when others => -- Positivo a>=b : se corre a delta espacios a la derecha y a se queda quieto
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s2um0 <= s2uma;
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s2xorslab <= (others => s2signa);
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s2smshift <= s2umb;
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end case;
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end case;
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end process;
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end process;
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denormhighshiftermult:lpm_mult
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--! Correr las mantissas y calcularlas.
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hshiftdenorm: lpm_mult
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,18,27)
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,18,27)
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port map (s2factor,'1'&s2smshift(22 downto 06),s2psh);
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port map (s1shifter,'1'&s1umantshift(22 downto 06),s1ph);
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lshiftdenorm: lpm_mult
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denormlowshiftermult:lpm_mult
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,9,18)
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,9,18)
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port map (s2factor,s2smshift(05 downto 00)&"000",s2psl);
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port map (s1shifter,s1umantshift(5 downto 0)&"000",s1pl);
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s1postshift(23 downto 7) <= s1ph(25 downto 9);
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s1postshift(06 downto 0) <= s1ph(08 downto 2) or s1pl(17 downto 11);
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s1xorslab(23 downto 0) <= (others => s1umantfixed(23));
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--! ******************************************************************************************************************************
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--! Combinatorial Gremlin, Etapa 2: Signar la mantissa denormalizada.
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--! Etapa2a signar las mantissas y sumarlas.
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s2xorslab <= (others => s2umantshift(24));
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signmantissa:
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process(s2asign,s2aum1,s2asm0,s2azero)
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begin
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s2axorslab <= (others => s2asign);
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s2asm1 <= (s2axorslab(23)&(s2aum1 xor (s2axorslab)))+(x"000000"&s2axorslab(23));
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case s2azero is
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when '0' => s2asm <= (s2asm1(s2asm1'high)&s2asm1) + (s2asm0(s2asm0'high)&s2asm0);
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when others => s2asm <= (s2asm1(s2asm1'high)&s2asm1) or (s2asm0(s2asm0'high)&s2asm0);
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end case;
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end process;
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--! ******************************************************************************************************************************
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--! Combinatorial Gremlin, Etapa 4: Quitar el signo de la mantissa resultante.
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--! Etapa3 : Quitar el signo a las mantissa.
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s4xorslab <= (others => s4sresult(25));
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--! ******************************************************************************************************************************
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unsignmantissa:
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--! Combinatorial Gremlin, Etapa 5: Codificar el factor de normalizacion de la mantissa resultante.
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process(s3sm)
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normalizerdecodeshift:
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begin
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process (s5result,s5factorhot25)
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s3xorslab <= ( others => s3sm(s3sm'high) );
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s3um(24 downto 0) <= ( s3sm(24 downto 0) xor s3xorslab ) + (x"000000"&s3xorslab(24));
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s3sign <= s3sm(s3sm'high);
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end process;
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--! ******************************************************************************************************************************
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--! Etapa3a : Decodificar el factor de corrimiento y calcular el exponente normalizado.
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--! ******************************************************************************************************************************
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redentioform:
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process(s3aum,s3asign)
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begin
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begin
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s3ashift <= s3aexp;
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s5factor<=(others => '0');
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s3afactorhot <= (others => '0');
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s5factorhot25 <= (others => '0');
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for i in 24 downto 0 loop
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for i in 24 downto 0 loop
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if s3aum(i)='1' then
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if s5result(i)='1' then
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s3ashift <= conv_std_logic_vector(24-i,8)+x"ff";
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--s5factor <= conv_std_logic_vector(24-i,8);
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s3afactorhot(24-i) <= '1';
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s5factorhot25(24-i) <= '1';
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exit;
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exit;
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end if;
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end if;
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end loop;
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end loop;
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s5factorhot9 <= (s5factorhot25(8 downto 1)or s5factorhot25(16 downto 9)or s5factorhot25(24 downto 17)) & s5factorhot25(0);
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end process;
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end process;
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--! ******************************************************************************************************************************
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normhighshiftermult:lpm_mult
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--! Etapa4 : Normalizar la mantissa y calcular el exponente. Entregar el resultado
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--! ******************************************************************************************************************************
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--!Normalizacion mediante multiplicacion
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process (s4ph,s4pl,s4factorhot,s4um)
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begin
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s4postshift(22 downto 15) <= s4ph(16 downto 9);
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s4postshift(14 downto 06) <= s4ph(08 downto 0) or s4pl(17 downto 9);
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s4postshift(05 downto 00) <= s4pl(08 downto 3);
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case s4shift(4 downto 3) is
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when "00" =>
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s4factorhot9 <= s4factorhot(08 downto 01)&'0';
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when "01" =>
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s4factorhot9 <= s4factorhot(16 downto 09)&'0';
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when "10" =>
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s4factorhot9 <= s4factorhot(24 downto 17)&'0';
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when others =>
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s4factorhot9 <= s4factorhot(08 downto 00);
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end case;
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end process;
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hshiftnorm: lpm_mult
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,18,27)
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,18,27)
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port map (s4factorhot9,s4um(24 downto 07),s4ph);
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port map (s5factorhot9,s5result(24 downto 7),s5ph);
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lshiftnorm: lpm_mult
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normlowshiftermult:lpm_mult
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,9,18)
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generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,9,18)
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port map (s4factorhot9,s4um(06 downto 00)&"00",s4pl);
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port map (s5factorhot9,s5result(06 downto 0)&"00",s5pl);
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s5postshift(22 downto 15) <= s5ph(16 downto 09);
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s5postshift(14 downto 06) <= s5ph(08 downto 00) or s5pl(17 downto 9);
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s5postshift(05 downto 00) <= s5pl(08 downto 03);
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end fadd32_arch;
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end ema32x2_arch;
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No newline at end of file
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No newline at end of file
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