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--! @file opcoder.vhd
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--! @brief Operation decoder. \n Decodificador de operacion.
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--------------------------------------------------------------
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-- RAYTRAC
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-- RAYTRAC
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-- Author Julian Andres Guarin
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-- Author Julian Andres Guarin
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-- opcoder.vhd
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-- opcoder.vhd
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-- This file is part of raytrac.
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-- This file is part of raytrac.
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--
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--
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- GNU General Public License for more details.
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--
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--
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-- You should have received a copy of the GNU General Public License
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-- You should have received a copy of the GNU General Public License
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-- along with raytrac. If not, see <http://www.gnu.org/licenses/>.
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-- along with raytrac. If not, see <http://www.gnu.org/licenses/>.
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--! Libreria ieee. 'n Good oldie IEEE.
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library ieee;
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library ieee;
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--! Paquete de manejo de logica estandard. \n Standard logic managment package.
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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--! The opcoder entity is the operation decoder combinatorial stage. \n La entidad opcoder es la etapa combinatoria que decodifica la operacion que se va a realizar.
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--! The inputs to this hardware are: A,B,C,D vectors, opcode and add code inputs. The outputs are the operands of the 6 multipliers an uf entity has. The multipliers operands, also known as factors are m0f0 and m0f1 for the multiplier 0, m1f0 and m1f1 for the multiplier 1.. and so on until the multiplier 5. Basically what operates here in this description is a mux, which selects through opcode and addcode what vector components are going to be the multipliers operands.\n So if the opcode value is 0, it means that a dot product is to be done, so the m0f0 and m0f1 are going to be Ax and Bx respectively, and so on. If opcode is 1, it means that a cross product is to be performed, but the UF has only capacity to make a single cross product at --! the same time, meaning it will perform AxB OR CxD exclusively.\n\n In order to understand check the following table:
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entity opcoder is
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entity opcoder is
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port (
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port (
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Ax,Bx,Cx,Dx,Ay,By,Cy,Dy,Az,Bz,Cz,Dz : in std_logic_vector (17 downto 0);
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Ax,Bx,Cx,Dx,Ay,By,Cy,Dy,Az,Bz,Cz,Dz : in std_logic_vector (17 downto 0);
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m0f0,m0f1,m1f0,m1f1,m2f0,m2f1,m3f0,m3f1,m4f0,m4f1,m5f0,m5f1 : out std_logic_vector (17 downto 0);
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m0f0,m0f1,m1f0,m1f1,m2f0,m2f1,m3f0,m3f1,m4f0,m4f1,m5f0,m5f1 : out std_logic_vector (17 downto 0);
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