URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] [raytrac/] [trunk/] [uf.vhd] - Diff between revs 2 and 3

Rev 2	Rev 3
Line 6...	Line 6...


`entity uf is`	`entity uf is`
`port (`	`port (`
`opcode : in std_logic;`	`opcode : in std_logic;`
`vectors : in std_logic_vector (12*18-1 downto 0);`	`v0,v1,v2,v3 : in std_logic_vector (6*18-1 downto 0);`
	`cp`

`clk,rst, ena : in std_logic`	`clk,rst, ena : in std_logic`
`);`	`);`
`end uf;`	`end uf;`

`architecture uf_arch of uf is`	`architecture uf_arch of uf is`

	`s_prod : signal`

`s0_opcode : signal std_logic;`	`s0_opcode : signal std_logic;`

`s1_opcode: signal std_logic;`	`s1_opcode: signal std_logic;`

`s2_opcode : signal std_logic;`	`s2_opcode : signal std_logic;`
Line 26...	Line 30...


`begin`	`begin`


	`mx : for i in 0 to 5 generate`
	`mi : r_a18_b18_smul_c32_r port map (`
	`aclr => rst,`
	`clock => clk,`
	`dataa => v0 (i18+17 downto i18);`
	`datab => v1 (i18+17 downto i18);`






`end uf_arch;`	`end uf_arch;`

`No newline at end of file`	`No newline at end of file`