URL
https://opencores.org/ocsvn/rc4-prbs/rc4-prbs/trunk
[/] [rc4-prbs/] [trunk/] [rc4_tb.v] - Diff between revs 3 and 5
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 3 |
Rev 5 |
Line 33... |
Line 33... |
parameter tck = 10, program_cycles = `TEST_CYCLES;
|
parameter tck = 10, program_cycles = `TEST_CYCLES;
|
|
|
|
|
reg clk, rst; // clock, reset
|
reg clk, rst; // clock, reset
|
wire output_ready; // output ready (valid)
|
wire output_ready; // output ready (valid)
|
|
|
wire [7:0] K; // output
|
wire [7:0] K; // output
|
reg [7:0] password_input; //input
|
reg [7:0] password_input; //input
|
//wire [7:0] Kreg; // output
|
|
|
|
//assign Kreg=K;
|
|
/* Clocking device */
|
/* Clocking device */
|
always #(tck/2)
|
always #(tck/2)
|
clk = ~clk;
|
clk = ~clk;
|
|
|
|
|
|
/* Password loader and info display*/
|
integer clkcount;
|
integer clkcount;
|
always @ (posedge clk)
|
always @ (posedge clk)
|
begin
|
begin
|
clkcount<=clkcount+1;
|
clkcount<=clkcount+1;
|
if (clkcount < `KEY_SIZE)
|
if (clkcount < `KEY_SIZE)
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.