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package rf6809_pkg;
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package rf6809_pkg;
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typedef logic [23:0] Address;
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typedef logic [23:0] Address;
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typedef logic [11:0] Data;
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typedef logic [11:0] Data;
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// Breakpoint Control Register
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// One for each breakpoint address register
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typedef struct packed
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{
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logic hit;
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logic [2:0] pad;
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logic en;
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logic trace_en;
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logic [1:0] match_type;
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logic [3:0] amask;
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} brkCtrl;
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// Breakpoint match types
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parameter BMT_IA = 2'd0;
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parameter BMT_DS = 2'd1;
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parameter BMT_LS = 2'd3;
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parameter bitsPerByte = $bits(Data);
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parameter bitsPerByte = $bits(Data);
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parameter BPB = bitsPerByte;
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parameter BPB = bitsPerByte;
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parameter BPBM1 = BPB-1;
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parameter BPBM1 = BPB-1;
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parameter BPBX2M1 = BPB*2-1;
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parameter BPBX2M1 = BPB*2-1;
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// The following adds support for many 6309 instructions.
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// The following adds support for many 6309 instructions.
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//`define SUPPORT_6309
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`define SUPPORT_6309 1
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// Support BCD arithmetic mode and the decimal mode flag
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`define SUPPORT_BCD 1
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// Support divide operations
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`define SUPPORT_DIVIDE 1
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`define SUPPORT_DEBUG_REG 1
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// The following allows asynchronous reads for icache updating.
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// The following allows asynchronous reads for icache updating.
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// It increases the size of the core.
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// It increases the size of the core.
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//`define SUPPORT_AREAD 1
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//`define SUPPORT_AREAD 1
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`ifdef EIGHTBIT
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`ifdef EIGHTBIT
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`define LOBYTE 7:0
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`define LOBYTE 7:0
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`define HIBYTE 15:8
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`define HIBYTE 15:8
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`define DBLBYTE 15:0
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`define DBLBYTE 15:0
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`define TRPBYTE 23:0
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`define TRPBYTE 23:0
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`define QUADBYTE 31:0
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`define BYTE1 7:0
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`define BYTE1 7:0
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`define BYTE2 15:8
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`define BYTE2 15:8
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`define BYTE3 23:16
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`define BYTE3 23:16
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`define BYTE4 31:24
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`define BYTE4 31:24
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`define BYTE5 39:32
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`define BYTE5 39:32
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`ifdef TWELVEBIT
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`ifdef TWELVEBIT
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`define LOBYTE 11:0
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`define LOBYTE 11:0
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`define HIBYTE 23:12
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`define HIBYTE 23:12
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`define DBLBYTE 23:0
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`define DBLBYTE 23:0
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`define TRPBYTE 35:0
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`define TRPBYTE 35:0
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`define QUADBYTE 47:0
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`define BYTE1 11:0
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`define BYTE1 11:0
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`define BYTE2 23:12
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`define BYTE2 23:12
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`define BYTE3 35:24
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`define BYTE3 35:24
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`define BYTE4 47:36
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`define BYTE4 47:36
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`define BYTE5 59:48
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`define BYTE5 59:48
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`define SWI_VECT 24'hFFFFFA
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`define SWI_VECT 24'hFFFFFA
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`define IRQ_VECT 24'hFFFFF8
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`define IRQ_VECT 24'hFFFFF8
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`define FIRQ_VECT 24'hFFFFF6
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`define FIRQ_VECT 24'hFFFFF6
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`define SWI2_VECT 24'hFFFFF4
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`define SWI2_VECT 24'hFFFFF4
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`define SWI3_VECT 24'hFFFFF2
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`define SWI3_VECT 24'hFFFFF2
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`define RESV_VECT 24'hFFFFF0
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`define IOP_VECT 24'hFFFFF0
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`define IPL7_VECT 24'hFFFFEE
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`define IPL6_VECT 24'hFFFFEC
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`define IPL5_VECT 24'hFFFFEA
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`define IPL4_VECT 24'hFFFFE8
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`define IPL3_VECT 24'hFFFFE6
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`define IPL2_VECT 24'hFFFFE4
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`define IPL1_VECT 24'hFFFFE2
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`define DBG_VECT 24'hFFFFE0
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`define MSCOUNT 24'hFFFF14
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`define CHKPOINT 24'hFFFF11
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`define CORENO 24'hFFFF10
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`define BRKCTRL3 24'hFFFF0B
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`define BRKCTRL2 24'hFFFF0A
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`define BRKCTRL1 24'hFFFF09
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`define BRKCTRL0 24'hFFFF08
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`define BRKAD3 24'hFFFF06
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`define BRKAD2 24'hFFFF04
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`define BRKAD1 24'hFFFF02
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`define BRKAD0 24'hFFFF00
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`define NEG_DP 12'h000
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`define NEG_DP 12'h000
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`define OIM_DP 12'h001
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`define OIM_DP 12'h001
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`define AIM_DP 12'h002
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`define AIM_DP 12'h002
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`define COM_DP 12'h003
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`define COM_DP 12'h003
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`define STS_NDX 12'h1EF
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`define STS_NDX 12'h1EF
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`define LDQ_EXT 12'h1FC
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`define LDQ_EXT 12'h1FC
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`define STQ_EXT 12'h1FD
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`define STQ_EXT 12'h1FD
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`define LDS_EXT 12'h1FE
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`define LDS_EXT 12'h1FE
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`define STS_EXT 12'h1FF
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`define STS_EXT 12'h1FF
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`define BITMD 12'h23C
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`define LDMD 12'h23D
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`define LDMD 12'h23D
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`define SWI3 12'h23F
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`define SWI3 12'h23F
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`define COME 12'h243
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`define COME 12'h243
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`define DECE 12'h24A
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`define DECE 12'h24A
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`define INCE 12'h24C
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`define INCE 12'h24C
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`define SUBE_IMM 12'h280
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`define SUBE_IMM 12'h280
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`define CMPU_IMM 12'h283
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`define CMPU_IMM 12'h283
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`define LDE_IMM 12'h286
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`define LDE_IMM 12'h286
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`define ADDE_IMM 12'h28B
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`define ADDE_IMM 12'h28B
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`define DIVD_IMM 12'h28D
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`define DIVD_IMM 12'h28D
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`define DIVQ_IMM 12'h28E
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`define MULD_IMM 12'h28F
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`define SUBE_DP 12'h290
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`define SUBE_DP 12'h290
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`define LDE_DP 12'h296
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`define LDE_DP 12'h296
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`define ADDE_DP 12'h29B
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`define ADDE_DP 12'h29B
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`define DIVD_DP 12'h29D
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`define DIVD_DP 12'h29D
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`define DIVQ_DP 12'h29E
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`define MULD_DP 12'h29F
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`define SUBE_NDX 12'h2A0
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`define SUBE_NDX 12'h2A0
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`define LDE_NDX 12'h2A6
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`define LDE_NDX 12'h2A6
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`define ADDE_NDX 12'h2AB
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`define ADDE_NDX 12'h2AB
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`define DIVD_NDX 12'h2AD
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`define DIVD_NDX 12'h2AD
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`define DIVQ_NDX 12'h2AE
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`define MULD_NDX 12'h2AF
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`define SUBE_EXT 12'h2B0
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`define SUBE_EXT 12'h2B0
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`define LDE_EXT 12'h2B6
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`define LDE_EXT 12'h2B6
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`define ADDE_EXT 12'h2BB
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`define ADDE_EXT 12'h2BB
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`define DIVD_EXT 12'h2BD
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`define DIVD_EXT 12'h2BD
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`define DIVQ_EXT 12'h2BE
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`define MULD_EXT 12'h2BF
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`define SUBF_IMM 12'h2C0
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`define SUBF_IMM 12'h2C0
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`define LDF_IMM 12'h2C6
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`define LDF_IMM 12'h2C6
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`define ADDF_IMM 12'h2CB
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`define ADDF_IMM 12'h2CB
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`define SUBF_DP 12'h2D0
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`define SUBF_DP 12'h2D0
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`define LDF_DP 12'h2D6
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`define LDF_DP 12'h2D6
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