URL https://opencores.org/ocsvn/rf6809/rf6809/trunk

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[/] [rf6809/] [trunk/] [software/] [boot/] [disassem.asm] - Diff between revs 14 and 15

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Rev 14	Rev 15
Line 32...	Line 32...
`; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE`	`; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE`
`; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.`	`; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.`
`;`	`;`
`; ============================================================================`	`; ============================================================================`
`;`	`;`
	`farflag EQU $15F`
	`asmbuf EQU $160 ; to $17F`
	`CharOutVec EQU $800`
	`CharInVec EQU $804`

`; Disassembler`	`; Disassembler`
`;`	`;`
`;`	`;`
`DIRECT EQU 1`	`DIRECT EQU 1`
`LSREL EQU 2`	`LSREL EQU 2`
Line 423...	Line 428...
`fcb "CMPU", EXT`	`fcb "CMPU", EXT`
`fcb "CMPS", EXT`	`fcb "CMPS", EXT`

`disassem:`	`disassem:`
`clr farflag`	`clr farflag`
`lbsr GetRange`	`swi`
`lbsr CRLF`	`fcb MF_GetRange`
	`swi`
	`fcb MF_CRLF`
`ldy mon_r1+2`	`ldy mon_r1+2`
`disLoop1:`	`disLoop1:`
`tfr y,d`	`tfr y,d`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb #' '`	`ldb #' '`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,y+`	`ldb ,y+`
`bitb #$300`	`bitb #$300`
`lbne dis1`	`lbne dis1`
`andb #$FF ; mask off extra bits`	`andb #$FF ; mask off extra bits`
`cmpb #$15`	`cmpb #$15`
Line 446...	Line 455...
`dis23:`	`dis23:`
`lda #5`	`lda #5`
`mul`	`mul`
`abx`	`abx`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #' '`	`ldb #' '`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,x+`	`ldb ,x+`
`lbeq disNextLine`	`lbeq disNextLine`
`cmpb #DIRECT`	`cmpb #DIRECT`
`bne disNotDirect`	`bne disNotDirect`
`ldb ,y+`	`ldb ,y+`
`lbsr DispByteAsHex`	`swi`
	`fcb MF_DisplayByteAsHex`
`lbra disNextLine`	`lbra disNextLine`
`disNotDirect:`	`disNotDirect:`
`cmpb #LSREL`	`cmpb #LSREL`
`bne disNotLRel`	`bne disNotLRel`
`dis21:`	`dis21:`
`ldd ,y++`	`ldd ,y++`
`dis2:`	`dis2:`
`leax d,y`	`leax d,y`
`tfr x,d`	`tfr x,d`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`lbra disNextLine`	`lbra disNextLine`
`disNotLRel:`	`disNotLRel:`
`cmpb #SREL`	`cmpb #SREL`
`bne disNotRel`	`bne disNotRel`
`ldb ,y+`	`ldb ,y+`
Line 492...	Line 508...
`bitb #$100 ; test for negative offset`	`bitb #$100 ; test for negative offset`
`beq dis3`	`beq dis3`
`deca ; sign extend offset`	`deca ; sign extend offset`
`orb #$E00`	`orb #$E00`
`dis3:`	`dis3:`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNot9:`	`disNot9:`
`pshs b`	`pshs b`
`bitb #$100 ; check if indirect`	`bitb #$100 ; check if indirect`
`beq dis4`	`beq dis4`
`ldb #'['`	`ldb #'['`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis4:`	`dis4:`
`ldb ,s ; get back b`	`ldb ,s ; get back b`
`andb #15`	`andb #15`
`bne disNotRplus`	`bne disNotRplus`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis5`	`beq dis5`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis5:`	`dis5:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'+'`	`ldb #'+'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotRplus:`	`disNotRplus:`
`cmpb #1`	`cmpb #1`
`bne disNotRplusplus`	`bne disNotRplusplus`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis6`	`beq dis6`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis6:`	`dis6:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'+'`	`ldb #'+'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotRplusplus:`	`disNotRplusplus:`
`cmpb #2`	`cmpb #2`
`bne disNotRminus`	`bne disNotRminus`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis7`	`beq dis7`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis7:`	`dis7:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotRminus:`	`disNotRminus:`
`cmpb #3`	`cmpb #3`
`bne disNotRminusminus`	`bne disNotRminusminus`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis8`	`beq dis8`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis8:`	`dis8:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotRminusminus:`	`disNotRminusminus:`
`cmpb #4`	`cmpb #4`
`bne disNotR`	`bne disNotR`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis9`	`beq dis9`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis9:`	`dis9:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotR:`	`disNotR:`
`cmpb #5`	`cmpb #5`
`bne disNotBOffs`	`bne disNotBOffs`
`ldb #'B'`	`ldb #'B'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis10`	`beq dis10`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis10:`	`dis10:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotBOffs:`	`disNotBOffs:`
`cmpb #6`	`cmpb #6`
`bne disNotAOffs`	`bne disNotAOffs`
`ldb #'A'`	`ldb #'A'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis11`	`beq dis11`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis11:`	`dis11:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotAOffs:`	`disNotAOffs:`
`cmpb #8`	`cmpb #8`
`bne disNotBO`	`bne disNotBO`
`ldb ,y+`	`ldb ,y+`
`sex`	`sex`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis12`	`beq dis12`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis12:`	`dis12:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotBO:`	`disNotBO:`
`cmpb #9`	`cmpb #9`
`bne disNotWO`	`bne disNotWO`
`ldd ,y++`	`ldd ,y++`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis13`	`beq dis13`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis13:`	`dis13:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotWO:`	`disNotWO:`
`cmpb #10`	`cmpb #10`
`bne disNotTO`	`bne disNotTO`
`ldb ,y++`	`ldb ,y++`
`lbsr DispByteAsHex`	`swi`
	`fcb MF_DisplayByteAsHex`
`ldd ,y++`	`ldd ,y++`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis14`	`beq dis14`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis14:`	`dis14:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotTO:`	`disNotTO:`
`cmpb #11`	`cmpb #11`
`bne disNotDOffs`	`bne disNotDOffs`
`ldb #'D'`	`ldb #'D'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis15`	`beq dis15`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis15:`	`dis15:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotDOffs:`	`disNotDOffs:`
`cmpb #12`	`cmpb #12`
`bne disNotPBO`	`bne disNotPBO`
`ldb ,y+`	`ldb ,y+`
`sex`	`sex`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis16`	`beq dis16`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis16:`	`dis16:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`ldb #'P'`	`ldb #'P'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'C'`	`ldb #'C'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotPBO:`	`disNotPBO:`
`cmpb #13`	`cmpb #13`
`bne disNotPWO`	`bne disNotPWO`
`ldd ,y++`	`ldd ,y++`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis17`	`beq dis17`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis17:`	`dis17:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`ldb #'P'`	`ldb #'P'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'C'`	`ldb #'C'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotPWO:`	`disNotPWO:`
`cmpb #14`	`cmpb #14`
`bne disNotPTO`	`bne disNotPTO`
`ldb ,y+`	`ldb ,y+`
`lbsr DispByteAsHex`	`swi`
	`fcb MF_DisplayByteAsHex`
`ldd ,y++`	`ldd ,y++`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb ,s`	`ldb ,s`
`bitb #$80 ; outer indexed?`	`bitb #$80 ; outer indexed?`
`beq dis18`	`beq dis18`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`dis18:`	`dis18:`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`bsr disNdxReg`	`bsr disNdxReg`
`ldb #'P'`	`ldb #'P'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'C'`	`ldb #'C'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #'-'`	`ldb #'-'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`puls b`	`puls b`
`bitb #$100`	`bitb #$100`
`lbeq disNextLine`	`lbeq disNextLine`
`bitb #$80`	`bitb #$80`
`lbne disNextLine`	`lbne disNextLine`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotPTO:`	`disNotPTO:`
`ldb #'['`	`ldb #'['`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldd ,y++`	`ldd ,y++`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`ldb #']'`	`ldb #']'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra disNextLine`	`lbra disNextLine`
`disNotNdx:`	`disNotNdx:`
`cmpb #EXT`	`cmpb #EXT`
`bne disNotExt`	`bne disNotExt`
`tst farflag`	`tst farflag`
`beq dis30`	`beq dis30`
`ldb ,y++`	`ldb ,y++`
`lbsr DispByteAsHex`	`swi`
	`fcb MF_DisplayByteAsHex`
`dis30:`	`dis30:`
`ldd ,y++`	`ldd ,y++`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`clr farflag`	`clr farflag`
`lbra disNextLine`	`lbra disNextLine`
`disNotExt:`	`disNotExt:`
`cmpb #IMMB`	`cmpb #IMMB`
`bne disNotIMMB`	`bne disNotIMMB`
`ldb #'#'`	`ldb #'#'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,y+`	`ldb ,y+`
`lbsr DispByteAsHex`	`swi`
	`fcb MF_DisplayByteAsHex`
`lbra disNextLine`	`lbra disNextLine`
`disNotIMMB:`	`disNotIMMB:`
`cmpb #IMMW`	`cmpb #IMMW`
`bne disNotIMMW`	`bne disNotIMMW`
`ldb #'#'`	`ldb #'#'`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldd ,y++`	`ldd ,y++`
`lbsr DispWordAsHex`	`swi`
	`fcb MF_DisplayWordAsHex`
`bra disNextLine`	`bra disNextLine`
`disNotIMMW:`	`disNotIMMW:`
`cmpb #TFREXG`	`cmpb #TFREXG`
`bne disNotTfr`	`bne disNotTfr`
`ldb ,y+`	`ldb ,y+`
Line 938...	Line 1061...
`ldx #distbl2`	`ldx #distbl2`
`aslb`	`aslb`
`aslb`	`aslb`
`abx`	`abx`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,x+`	`ldb ,x+`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb #' '`	`ldb #' '`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`lbra dis21`	`lbra dis21`
`dis19:`	`dis19:`
`ldx #0`	`ldx #0`
`dis24:`	`dis24:`
`cmpb distbl3,x`	`cmpb distbl3,x`
Line 960...	Line 1088...
`dis25:`	`dis25:`
`inx`	`inx`
`cmpx #31`	`cmpx #31`
`blo dis24`	`blo dis24`
`ldb #'?'`	`ldb #'?'`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
`lbsr OUTCH`	`swi`
`lbsr OUTCH`	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
	`swi`
	`fcb MF_OUTCH`
`bra disNextLine`	`bra disNextLine`
`disNextLine:`	`disNextLine:`
`clr farflag`	`clr farflag`
`lbsr CRLF`	`swi`
	`fcb MF_CRLF`
`cmpy mon_r2+2`	`cmpy mon_r2+2`
`lblo disLoop1`	`lblo disLoop1`
`lbra Monitor`	`disJmpMon:`
	`swi`
	`fcb MF_Monitor`
	`bra disJmpMon`

`disNdxRegs:`	`disNdxRegs:`
`fcb 'X','Y','S','U'`	`fcb 'X','Y','S','U'`
`disTfrRegs:`	`disTfrRegs:`
`fcb "D X Y U S PC A B CCDP "`	`fcb "D X Y U S PC A B CCDP "`
Line 997...	Line 1133...
`pshs b,x`	`pshs b,x`
`ldx #disTfrRegs`	`ldx #disTfrRegs`
`aslb`	`aslb`
`lda b,x`	`lda b,x`
`exg a,b`	`exg a,b`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`exg a,b`	`exg a,b`
`inx`	`inx`
`ldb b,x`	`ldb b,x`
`cmpb #' '`	`cmpb #' '`
`beq disTfr1`	`beq disTfr1`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`disTfr1:`	`disTfr1:`
`puls b,x,pc`	`puls b,x,pc`

`disTfrExg:`	`disTfrExg:`
`pshs b`	`pshs b`
Line 1016...	Line 1154...
`rolb`	`rolb`
`rolb`	`rolb`
`andb #15`	`andb #15`
`bsr disTfrReg`	`bsr disTfrReg`
`ldb #','`	`ldb #','`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`ldb ,s`	`ldb ,s`
`andb #15`	`andb #15`
`bsr disTfrReg`	`bsr disTfrReg`
`puls b,pc`	`puls b,pc`

Line 1030...	Line 1169...
`std CharOutVec`	`std CharOutVec`
`puls d,pc`	`puls d,pc`

`ASMOO:`	`ASMOO:`
`pshs d`	`pshs d`
`ldd #DisplayChar`	`'' ldd #DisplayChar`
`std CharOutVec`	`std CharOutVec`
`puls d,pc`	`puls d,pc`

`ASMOUTCH:`	`ASMOUTCH:`
`stb ,u+`	`stb ,u+`
Line 1043...	Line 1182...
`DumpAsmbuf:`	`DumpAsmbuf:`
`ldu #asmbuf`	`ldu #asmbuf`
`dab2:`	`dab2:`
`ldb ,u+`	`ldb ,u+`
`beq dab1`	`beq dab1`
`lbsr OUTCH`	`swi`
	`fcb MF_OUTCH`
`bra dab2`	`bra dab2`
`dab1:`	`dab1:`
`rts`	`rts`

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[/] [rf6809/] [trunk/] [software/] [boot/] [disassem.asm] - Diff between revs 14 and 15