Line 8... |
Line 8... |
-- Description
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-- Description
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-- Containing a bridge between a RapidIO network and a Wishbone bus. Packets
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-- Containing a bridge between a RapidIO network and a Wishbone bus. Packets
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-- NWRITE, NWRITER and NREAD are currently supported.
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-- NWRITE, NWRITER and NREAD are currently supported.
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--
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--
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-- To Do:
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-- To Do:
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-- REMARK: Set the stb_o to '0' in between read accesses to conform better to a
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-- - Move packet handlers to RioLogicalPackets.
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-- - Move component declarations to riocommon.
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-- - Update the Maintenance handler to the new interface. It currently does not
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-- compile.
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-- - Set the stb_o to '0' in between read accesses to conform better to a
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-- block transfer in the Wishbone standard.
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-- block transfer in the Wishbone standard.
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-- REMARK: Clean up cyc-signals, only stb-signals are needed (between
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-- - Clean up cyc-signals, only stb-signals are needed (between
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-- RioLogicalCommon and the packet handlers).
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-- RioLogicalCommon and the packet handlers).
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-- REMARK: Add support for the lock_o to be sure to transfer all the packet
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-- - Add support for the lock_o to be sure to transfer all the packet
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-- content atomically?
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-- content atomically?
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-- REMARK: Add support for EXTENDED_ADDRESS.
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-- - Add support for EXTENDED_ADDRESS.
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-- REMARK: Use the baseDeviceId when sending packets? Currently, all responses
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-- - Add support for addressing to implementation defined config space by
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-- adding interface to top entity.
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-- - Use the baseDeviceId when sending packets? Currently, all responses
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-- are sent with destination<->source exchanged so the baseDeviceId is not
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-- are sent with destination<->source exchanged so the baseDeviceId is not
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-- needed.
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-- needed.
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-- REMARK: Support inbound data with full bandwidth, not just half, applies to
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-- - Support inbound data with full bandwidth, not just half, applies to
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-- RioLogicalCommon and the packet handlers.
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-- RioLogicalCommon and the packet handlers.
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-- REMARK: Move the packet handlers to seperate files.
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-- - Move the packet handlers to seperate files.
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-- REMARK: Increase the priority of the response-packet when sent?
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-- - Increase the priority of the response-packet when sent?
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-- REMARK: Implement error indications if erronous packets are received.
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-- - Implement error indications if erronous packets are received.
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-- REMARK: Implement error indications if err_i is received on the Wishbone bus.
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-- - Implement error indications if err_i is received on the Wishbone bus.
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-- REMARK: Add support for extended features to dynamically configure the status
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-- - Add support for extended features to dynamically configure the status
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-- from the port this block is connected to. Needed for the discovered- and
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-- from the port this block is connected to. Needed for the discovered- and
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-- masterEnable-bits.
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-- masterEnable-bits.
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-- REMARK: Add support for outbound doorbells connected to interrupt input pins.
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-- - Add support for outbound doorbells connected to interrupt input pins.
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--
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--
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-- Author(s):
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-- Author(s):
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-- - Magnus Rosenius, magro732@opencores.org
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-- - Magnus Rosenius, magro732@opencores.org
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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Line 203... |
Line 209... |
outboundStb_o : out std_logic;
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outboundStb_o : out std_logic;
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outboundDat_o : out std_logic_vector(31 downto 0);
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outboundDat_o : out std_logic_vector(31 downto 0);
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outboundAck_i : in std_logic);
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outboundAck_i : in std_logic);
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end component;
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end component;
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component RioLogicalMaintenance is
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port(
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clk : in std_logic;
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areset_n : in std_logic;
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enable : in std_logic;
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configStb_o : out std_logic;
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configWe_o : out std_logic;
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configAdr_o : out std_logic_vector(21 downto 0);
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configDat_o : out std_logic_vector(31 downto 0);
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configDat_i : in std_logic_vector(31 downto 0);
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configAck_i : in std_logic;
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inboundCyc_i : in std_logic;
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inboundStb_i : in std_logic;
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inboundAdr_i : in std_logic_vector(7 downto 0);
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inboundDat_i : in std_logic_vector(31 downto 0);
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inboundAck_o : out std_logic;
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outboundCyc_o : out std_logic;
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outboundStb_o : out std_logic;
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outboundDat_o : out std_logic_vector(31 downto 0);
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outboundAck_i : in std_logic);
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end component;
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component RioLogicalCommon is
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generic(
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PORTS : natural);
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port(
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clk : in std_logic;
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areset_n : in std_logic;
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enable : in std_logic;
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readFrameEmpty_i : in std_logic;
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readFrame_o : out std_logic;
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readContent_o : out std_logic;
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readContentEnd_i : in std_logic;
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readContentData_i : in std_logic_vector(31 downto 0);
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writeFrameFull_i : in std_logic;
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writeFrame_o : out std_logic;
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writeFrameAbort_o : out std_logic;
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writeContent_o : out std_logic;
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writeContentData_o : out std_logic_vector(31 downto 0);
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inboundCyc_o : out std_logic;
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inboundStb_o : out std_logic;
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inboundAdr_o : out std_logic_vector(7 downto 0);
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inboundDat_o : out std_logic_vector(31 downto 0);
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inboundAck_i : in std_logic;
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outboundCyc_i : in std_logic_vector(PORTS-1 downto 0);
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outboundStb_i : in std_logic_vector(PORTS-1 downto 0);
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outboundDat_i : in std_logic_vector(32*PORTS-1 downto 0);
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outboundAck_o : out std_logic_vector(PORTS-1 downto 0));
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end component;
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constant PORTS : natural := 2;
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constant PORTS : natural := 2;
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type StateType is (IDLE,
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type StateType is (IDLE,
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REQUEST_CLASS, REQUEST_CLASS_RESPONSE,
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REQUEST_CLASS, REQUEST_CLASS_RESPONSE,
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WRITE_CLASS, WRITE_CLASS_ACCESS, WRITE_CLASS_ACK, WRITE_CLASS_RESPONSE);
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WRITE_CLASS, WRITE_CLASS_ACCESS, WRITE_CLASS_ACK, WRITE_CLASS_RESPONSE);
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Line 316... |
Line 265... |
signal responseError : std_logic;
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signal responseError : std_logic;
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signal responsePayloadPresent : std_logic;
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signal responsePayloadPresent : std_logic;
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signal responsePayload : std_logic_vector(63 downto 0);
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signal responsePayload : std_logic_vector(63 downto 0);
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signal responseDone : std_logic;
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signal responseDone : std_logic;
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signal readRequestInbound : std_logic;
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signal writeRequestInbound : std_logic;
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signal vcInbound : std_logic;
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signal crfInbound : std_logic;
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signal prioInbound : std_logic_vector(1 downto 0);
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signal ttInbound : std_logic_vector(1 downto 0);
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signal dstIdInbound : std_logic_vector(31 downto 0);
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signal srcIdInbound : std_logic_vector(31 downto 0);
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signal tidInbound : std_logic_vector(7 downto 0);
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signal offsetInbound : std_logic_vector(20 downto 0);
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signal wdptrInbound : std_logic;
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signal payloadLengthInbound : std_logic_vector(3 downto 0);
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signal payloadInbound : std_logic_vector(31 downto 0);
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signal readResponseMaint : std_logic;
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signal writeResponseMaint : std_logic;
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signal wdptrMaint : std_logic;
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signal payloadLengthMaint : std_logic_vector(3 downto 0);
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signal payloadIndexMaint : std_logic_vector(3 downto 0);
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signal payloadMaint : std_logic_vector(31 downto 0);
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signal doneMaint : std_logic;
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signal payloadIndexOutbound : std_logic_vector(3 downto 0);
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signal doneOutbound : std_logic;
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signal configStb : std_logic;
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signal configStb : std_logic;
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signal configWe : std_logic;
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signal configWe : std_logic;
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signal configAdr : std_logic_vector(21 downto 0);
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signal configAdr : std_logic_vector(21 downto 0);
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signal configAdrByte : std_logic_vector(23 downto 0);
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signal configAdrByte : std_logic_vector(23 downto 0);
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signal configDatWrite : std_logic_vector(31 downto 0);
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signal configDatWrite : std_logic_vector(31 downto 0);
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Line 579... |
Line 553... |
outboundCyc_o=>outboundCyc(0),
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outboundCyc_o=>outboundCyc(0),
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outboundStb_o=>outboundStb(0),
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outboundStb_o=>outboundStb(0),
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outboundDat_o=>outboundDat(31 downto 0),
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outboundDat_o=>outboundDat(31 downto 0),
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outboundAck_i=>outboundAck(0));
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outboundAck_i=>outboundAck(0));
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-----------------------------------------------------------------------------
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-- Maintenance packet processing.
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-- Maintenance packet processing.
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MaintenanceInst: RioLogicalMaintenance
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-----------------------------------------------------------------------------
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|
InboundMaintenance: MaintenanceInbound
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port map(
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port map(
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clk=>clk,
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clk=>clk, areset_n=>areset_n, enable=>enable,
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areset_n=>areset_n,
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readRequestReady_o=>readRequestInbound,
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enable=>enable,
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writeRequestReady_o=>writeRequestInbound,
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configStb_o=>configStb,
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readResponseReady_o=>open,
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configWe_o=>configWe,
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writeResponseReady_o=>open,
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configAdr_o=>configAdr,
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portWriteReady_o=>open,
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configDat_o=>configDatWrite,
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vc_o=>vcInbound,
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configDat_i=>configDatRead,
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crf_o=>crfInbound,
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configAck_i=>configAck,
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prio_o=>prioInbound,
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tt_o=>ttInbound,
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dstid_o=>dstIdInbound,
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srcid_o=>srcIdInbound,
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tid_o=>tidInbound,
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hop_o=>open,
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offset_o=>offsetInbound,
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wdptr_o=>wdptrInbound,
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payloadLength_o=>payloadLengthInbound,
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payloadIndex_i=>payloadIndexMaint,
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payload_o=>payloadInbound,
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done_i=>doneMaint,
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inboundCyc_i=>inboundCyc,
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inboundCyc_i=>inboundCyc,
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inboundStb_i=>inboundStb,
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inboundStb_i=>inboundStb,
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inboundAdr_i=>inboundAdr,
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inboundAdr_i=>inboundAdr,
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inboundDat_i=>inboundDat,
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inboundDat_i=>inboundDat,
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inboundAck_o=>maintenanceAck,
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inboundAck_o=>maintenanceAck);
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|
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OutboundMaintenance: MaintenanceOutbound
|
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port map(
|
|
clk=>clk, areset_n=>areset_n, enable=>enable,
|
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readRequestReady_i=>'0',
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writeRequestReady_i=>'0',
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readResponseReady_i=>readResponseMaint,
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writeResponseReady_i=>writeResponseMaint,
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portWriteReady_i=>'0',
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vc_i=>vcInbound,
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crf_i=>crfInbound,
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prio_i=>prioInbound,
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tt_i=>ttInbound,
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dstid_i=>srcIdInbound,
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srcid_i=>dstIdInbound,
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status_i=>"0000",
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tid_i=>tidInbound,
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hop_i=>x"ff",
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offset_i=>(others=>'0'),
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wdptr_i=>wdptrMaint,
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payloadLength_i=>payloadLengthMaint,
|
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payloadIndex_o=>payloadIndexOutbound,
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payload_i=>payloadMaint,
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done_o=>doneOutbound,
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outboundCyc_o=>outboundCyc(1),
|
outboundCyc_o=>outboundCyc(1),
|
outboundStb_o=>outboundStb(1),
|
outboundStb_o=>outboundStb(1),
|
outboundDat_o=>outboundDat(63 downto 32),
|
outboundDat_o=>outboundDat(63 downto 32),
|
outboundAck_i=>outboundAck(1));
|
outboundAck_i=>outboundAck(1));
|
|
|
|
MaintenanceBridge: RioLogicalMaintenance
|
|
port map(
|
|
clk=>clk, areset_n=>areset_n, enable=>enable,
|
|
readRequestReady_i=>readRequestInbound,
|
|
writeRequestReady_i=>writeRequestInbound,
|
|
offset_i=>offsetInbound,
|
|
wdptr_i=>wdptrInbound,
|
|
payloadLength_i=>payloadLengthInbound,
|
|
payloadIndex_o=>payloadIndexMaint,
|
|
payload_i=>payloadInbound,
|
|
done_o=>doneMaint,
|
|
readResponseReady_o=>readResponseMaint,
|
|
writeResponseReady_o=>writeResponseMaint,
|
|
wdptr_o=>wdptrMaint,
|
|
payloadLength_o=>payloadLengthMaint,
|
|
payloadIndex_i=>payloadIndexOutbound,
|
|
payload_o=>payloadMaint,
|
|
done_i=>doneOutbound,
|
|
configStb_o=>configStb,
|
|
configWe_o=>configWe,
|
|
configAdr_o=>configAdr,
|
|
configDat_o=>configDatWrite,
|
|
configDat_i=>configDatRead,
|
|
configAck_i=>configAck);
|
|
|
-----------------------------------------------------------------------------
|
-----------------------------------------------------------------------------
|
-- Common interface toward the packet queues.
|
-- Common interface toward the packet queues.
|
-----------------------------------------------------------------------------
|
-----------------------------------------------------------------------------
|
|
|
inboundAck <= requestAck or writeAck or maintenanceAck;
|
inboundAck <= requestAck or writeAck or maintenanceAck;
|