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[/] [rio/] [branches/] [parallelSymbols/] [rtl/] [vhdl/] [RioSerial.vhd] - Diff between revs 16 and 17

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Rev 16 Rev 17
Line 736... Line 736...
  -- Timeout logic.
  -- Timeout logic.
  -----------------------------------------------------------------------------
  -----------------------------------------------------------------------------
  process(areset_n, clk)
  process(areset_n, clk)
  begin
  begin
    if (areset_n = '0') then
    if (areset_n = '0') then
 
      timeSentElapsed <= (others=>'0');
 
      timeSentDelta <= (others=>'0');
      timeCurrent <= (others=>'0');
      timeCurrent <= (others=>'0');
    elsif (clk'event and clk = '1') then
    elsif (clk'event and clk = '1') then
 
      if (timeSentEnable = '0') then
 
        timeSentElapsed <= unsigned(timeCurrent) - unsigned(timeSentReadData);
 
        timeSentDelta <= unsigned('0' & portLinkTimeout_i) - timeSentElapsed;
 
      else
 
        timeSentElapsed <= (others=>'0');
 
        timeSentDelta <= (others=>'0');
 
      end if;
      timeCurrent <= std_logic_vector(unsigned(timeCurrent) + 1);
      timeCurrent <= std_logic_vector(unsigned(timeCurrent) + 1);
    end if;
    end if;
  end process;
  end process;
 
 
  timeSentElapsed <= unsigned(timeCurrent) - unsigned(timeSentReadData);
 
  timeSentDelta <= unsigned('0' & portLinkTimeout_i) - timeSentElapsed;
 
  timeSentExpired <= timeSentDelta(TIMEOUT_WIDTH);
  timeSentExpired <= timeSentDelta(TIMEOUT_WIDTH);
 
 
  timeSentEnable <= (not txFull_i) and (timeSentSet or timeSentReset);
  timeSentEnable <= (not txFull_i) and (timeSentSet or timeSentReset);
  timeSentWriteAddress <= ackIdWindowCurrent when timeSentSet = '1' else
  timeSentWriteAddress <= ackIdWindowCurrent when timeSentSet = '1' else
                          ackIdCurrent;
                          ackIdCurrent;
Line 1346... Line 1353...
 
 
    frameState_o <= frameState_i;
    frameState_o <= frameState_i;
    frameWordCounter_o <= frameWordCounter_i;
    frameWordCounter_o <= frameWordCounter_i;
    frameContent_o <= frameContent_i;
    frameContent_o <= frameContent_i;
    ackIdWindow_o <= ackIdWindow_i;
    ackIdWindow_o <= ackIdWindow_i;
 
    maintenanceClass_o <= maintenanceClass_i;
 
 
    timeSentSet_o <= '0';
    timeSentSet_o <= '0';
 
 
    symbolControlRestartOut <= '0';
    symbolControlRestartOut <= '0';
    symbolControlLinkRequestOut <= '0';
    symbolControlLinkRequestOut <= '0';
Line 1410... Line 1418...
        if ((sendRestartFromRetry = '0') and (sendLinkRequest = '0')  and
        if ((sendRestartFromRetry = '0') and (sendLinkRequest = '0')  and
            (outputErrorStopped_i = '0')) then
            (outputErrorStopped_i = '0')) then
          -- Check if a frame transfer is in progress.
          -- Check if a frame transfer is in progress.
          -- REMARK: Hold any data symbol if there is a pending symbol from the
          -- REMARK: Hold any data symbol if there is a pending symbol from the
          -- receiver side...
          -- receiver side...
 
 
          -- REMARK: This statemachine does not work... one tick ahead is needed...
 
          case frameState_i is
          case frameState_i is
 
 
            when FRAME_IDLE =>
            when FRAME_IDLE =>
              ---------------------------------------------------------------
              ---------------------------------------------------------------
              -- No frame has been started.
              -- No frame has been started.
Line 2929... Line 2935...
 
 
  signal readAddress : std_logic_vector(DEPTH_WIDTH-1 downto 0);
  signal readAddress : std_logic_vector(DEPTH_WIDTH-1 downto 0);
  signal readAddressInc : std_logic_vector(DEPTH_WIDTH-1 downto 0);
  signal readAddressInc : std_logic_vector(DEPTH_WIDTH-1 downto 0);
  signal writeAddress : std_logic_vector(DEPTH_WIDTH-1 downto 0);
  signal writeAddress : std_logic_vector(DEPTH_WIDTH-1 downto 0);
  signal writeAddressInc : std_logic_vector(DEPTH_WIDTH-1 downto 0);
  signal writeAddressInc : std_logic_vector(DEPTH_WIDTH-1 downto 0);
 
 
 
  signal change : std_logic;
begin
begin
 
 
  -- REMARK: Remove full here...
  -- REMARK: Remove full here...
  empty_o <= empty;
  empty_o <= empty;
  full_o <= full;
  full_o <= full;

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