URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [makefiles/] [make_cpu_sysc_plugin] - Diff between revs 3 and 4

Rev 3	Rev 4
Line 28...	Line 28...
`$(TOP_DIR)src/common`	`$(TOP_DIR)src/common`

`# source files directories list:`	`# source files directories list:`
`SRC_PATH =\`	`SRC_PATH =\`
`$(TOP_DIR)src/common \`	`$(TOP_DIR)src/common \`
	`$(TOP_DIR)src/common/generic \`
`$(TOP_DIR)src/cpu_sysc_plugin \`	`$(TOP_DIR)src/cpu_sysc_plugin \`
`$(TOP_DIR)src/cpu_sysc_plugin/riverlib \`	`$(TOP_DIR)src/cpu_sysc_plugin/riverlib \`
`$(TOP_DIR)src/cpu_sysc_plugin/riverlib/core \`	`$(TOP_DIR)src/cpu_sysc_plugin/riverlib/core \`
`$(TOP_DIR)src/cpu_sysc_plugin/riverlib/core/arith \`	`$(TOP_DIR)src/cpu_sysc_plugin/riverlib/core/arith \`
`$(TOP_DIR)src/cpu_sysc_plugin/riverlib/cache`	`$(TOP_DIR)src/cpu_sysc_plugin/riverlib/cache`