URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [libdbg64g/] [services/] [exec/] [cmd/] [cmd_halt.cpp] - Diff between revs 3 and 4

Rev 3	Rev 4
Line 39...	Line 39...
`return;`	`return;`
`}`	`}`

`Reg64Type t1;`	`Reg64Type t1;`
`DsuMapType *dsu = info_->getpDsu();`	`DsuMapType *dsu = info_->getpDsu();`
`DsuMapType::udbg_type::debug_region_type::control_reg ctrl;`	`GenericCpuControlType ctrl;`
`uint64_t addr_run_ctrl = reinterpret_cast<uint64_t>(&dsu->udbg.v.control);`	`uint64_t addr_run_ctrl = reinterpret_cast<uint64_t>(&dsu->udbg.v.control);`
`ctrl.val = 0;`	`ctrl.val = 0;`
`ctrl.bits.halt = 1;`	`ctrl.bits.halt = 1;`
`t1.val = ctrl.val;`	`t1.val = ctrl.val;`
`tap_->write(addr_run_ctrl, 8, t1.buf);`	`tap_->write(addr_run_ctrl, 8, t1.buf);`