URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [socsim_plugin/] [plugin_init.cpp] - Diff between revs 2 and 4

Rev 2	Rev 4
Line 10...	Line 10...
`#include "uart.h"`	`#include "uart.h"`
`#include "pnp.h"`	`#include "pnp.h"`
`#include "irqctrl.h"`	`#include "irqctrl.h"`
`#include "gnss_stub.h"`	`#include "gnss_stub.h"`
`#include "gptimers.h"`	`#include "gptimers.h"`
`#include "dsu.h"`
`#include "rfctrl.h"`	`#include "rfctrl.h"`
`#include "fsev2.h"`	`#include "fsev2.h"`
	`#include "uartmst.h"`
	`#include "hardreset.h"`
	`#include "debug/dsu.h"`
	`#include "debug/greth.h"`

`namespace debugger {`	`namespace debugger {`

`extern "C" void plugin_init(void) {`	`extern "C" void plugin_init(void) {`
`REGISTER_CLASS_IDX(BoardSim, 1);`	`REGISTER_CLASS_IDX(BoardSim, 1);`
Line 27...	Line 30...
`REGISTER_CLASS_IDX(GNSSStub, 7);`	`REGISTER_CLASS_IDX(GNSSStub, 7);`
`REGISTER_CLASS_IDX(DSU, 8);`	`REGISTER_CLASS_IDX(DSU, 8);`
`REGISTER_CLASS_IDX(GPTimers, 9);`	`REGISTER_CLASS_IDX(GPTimers, 9);`
`REGISTER_CLASS_IDX(RfController, 10);`	`REGISTER_CLASS_IDX(RfController, 10);`
`REGISTER_CLASS_IDX(FseV2, 11);`	`REGISTER_CLASS_IDX(FseV2, 11);`
	`REGISTER_CLASS_IDX(UartMst, 12);`
	`REGISTER_CLASS_IDX(Greth, 13);`
	`REGISTER_CLASS_IDX(HardReset, 14);`
`}`	`}`

`} // namespace debugger`	`} // namespace debugger`

`No newline at end of file`	`No newline at end of file`