Line 170... |
Line 170... |
end process;
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end process;
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|
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-- The SR fetch process read the value of the SR registers and passes it to
|
-- The SR fetch process read the value of the SR registers and passes it to
|
-- the execute pipeline. In addition it checks if the opcode modifies the
|
-- the execute pipeline. In addition it checks if the opcode modifies the
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-- SR register and if yes locks the register.
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-- SR register and if yes locks the register.
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sr_fetch : process (reset, sr, id_ex_register_next)
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sr_fetch : process (reset, sr, id_ex_register_next, stall_out_int )
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begin
|
begin
|
if reset = '0' then
|
if reset = '0' then
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id_ex_register_next.sr <= RESET_SR_VALUE;
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id_ex_register_next.sr <= RESET_SR_VALUE;
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else
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else
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id_ex_register_next.sr <= sr;
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id_ex_register_next.sr <= sr;
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Line 187... |
Line 187... |
lock_reg_addr1 <= (others => '-');
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lock_reg_addr1 <= (others => '-');
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set_reg_lock1 <= '0';
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set_reg_lock1 <= '0';
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end if;
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end if;
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end process;
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end process;
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|
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rx_decode_and_fetch : process (reset, if_id_register, id_ex_register_next, rx )
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rx_decode_and_fetch : process (reset, if_id_register, id_ex_register_next, rx, stall_out_int )
|
begin
|
begin
|
-- make sure we don't synthesize a latch for rx_addr
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-- make sure we don't synthesize a latch for rx_addr
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rx_addr_int <= (others => '0');
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rx_addr_int <= (others => '0');
|
|
|
if reset = '0' then
|
if reset = '0' then
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Line 209... |
Line 209... |
end if;
|
end if;
|
|
|
if opcode_modifies_rx(id_ex_register_next.opcode) = '1' and stall_out_int = '0' then
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if opcode_modifies_rx(id_ex_register_next.opcode) = '1' and stall_out_int = '0' then
|
lock_reg_addr0 <= id_ex_register_next.rX_addr;
|
lock_reg_addr0 <= id_ex_register_next.rX_addr;
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set_reg_lock0 <= '1';
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set_reg_lock0 <= '1';
|
|
elsif id_ex_register_next.opcode = OPCODE_JMP then
|
|
lock_reg_addr0 <= LR_REGISTER_ADDR;
|
|
set_reg_lock0 <= '1';
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else
|
else
|
lock_reg_addr0 <= (others => '-');
|
lock_reg_addr0 <= (others => '-');
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set_reg_lock0 <= '0';
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set_reg_lock0 <= '0';
|
end if;
|
end if;
|
end process;
|
end process;
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