URL
https://opencores.org/ocsvn/rise/rise/trunk
[/] [rise/] [trunk/] [vhdl/] [id_stage.vhd] - Diff between revs 72 and 73
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 72 |
Rev 73 |
| Line 255... |
Line 255... |
imm_fetch : process (reset, if_id_register, id_ex_register_next)
|
imm_fetch : process (reset, if_id_register, id_ex_register_next)
|
begin
|
begin
|
case id_ex_register_next.opcode is
|
case id_ex_register_next.opcode is
|
-- The immediate values holds the upper 8 bits of a 16 bit value.
|
-- The immediate values holds the upper 8 bits of a 16 bit value.
|
when OPCODE_LD_IMM_HB =>
|
when OPCODE_LD_IMM_HB =>
|
id_ex_register_next.immediate <= if_id_register.ir(7 downto 0) & x"00";
|
id_ex_register_next.immediate <= x"00" & if_id_register.ir(7 downto 0);
|
-- The immediate values holds the lower 8 bits of a 16 bit value.
|
-- The immediate values holds the lower 8 bits of a 16 bit value.
|
when OPCODE_LD_IMM =>
|
when OPCODE_LD_IMM =>
|
id_ex_register_next.immediate <= x"00" & if_id_register.ir(7 downto 0);
|
id_ex_register_next.immediate <= x"00" & if_id_register.ir(7 downto 0);
|
-- Default format holds the lower 4 bits of a 16 bit value.
|
-- Default format holds the lower 4 bits of a 16 bit value.
|
when others =>
|
when others =>
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.