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[/] [rise/] [trunk/] [vhdl/] [tb_id_stage_unit.vhd] - Diff between revs 17 and 71

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Rev 17 Rev 71
Line 10... Line 10... 
library ieee;
 
library ieee;
 
use ieee.std_logic_1164.all;
 
use ieee.std_logic_1164.all;
 
use ieee.std_logic_unsigned.all;
 
use ieee.std_logic_unsigned.all;
 
use ieee.numeric_std.all;
 
use ieee.numeric_std.all;
 
use work.rise_pack.all;
 
use work.rise_pack.all;
 
 
 
use work.RISE_PACK_SPECIFIC.all;
 
 
 
 
 
entity tb_id_stage_unit_vhd is
 
entity tb_id_stage_unit_vhd is
 
end tb_id_stage_unit_vhd;
 
end tb_id_stage_unit_vhd;
 
 
 
 
 
architecture behavior of tb_id_stage_unit_vhd is
 
architecture behavior of tb_id_stage_unit_vhd is
Line 69... Line 70... 
  signal lock_reg_addr0 : REGISTER_ADDR_T;
 
  signal lock_reg_addr0 : REGISTER_ADDR_T;
 
  signal set_reg_lock1  : std_logic;
 
  signal set_reg_lock1  : std_logic;
 
  signal lock_reg_addr1 : REGISTER_ADDR_T;
 
  signal lock_reg_addr1 : REGISTER_ADDR_T;
 
  signal stall_out      : std_logic;
 
  signal stall_out      : std_logic;
 
 
 
 
 
  constant TB_COND_TEST_VALUE : COND_T := COND_NONE;
 
  constant TB_COND_TEST_VALUE : COND_T := COND_UNCONDITIONAL;
 
 
 
 
 
  constant TB_R1_TEST_VALUE : REGISTER_T := x"0001";
 
  constant TB_R1_TEST_VALUE : REGISTER_T := x"0001";
 
  constant TB_R2_TEST_VALUE : REGISTER_T := x"0002";
 
  constant TB_R2_TEST_VALUE : REGISTER_T := x"0002";
 
  constant TB_R3_TEST_VALUE : REGISTER_T := x"0003";
 
  constant TB_R3_TEST_VALUE : REGISTER_T := x"0003";
 
 
 
 

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