| Line 63... |
Line 63... |
wire cmd_push_MMX_IDGROUP_MMX_ID.IDX;
|
wire cmd_push_MMX_IDGROUP_MMX_ID.IDX;
|
|
|
wire cmd_pop_MMX;
|
wire cmd_pop_MMX;
|
wire cmd_pop_MMX_IDGROUP_MMX_ID.IDX;
|
wire cmd_pop_MMX_IDGROUP_MMX_ID.IDX;
|
|
|
|
wire slave_empty_MMX;
|
wire [SLV_BITS-1:0] slave_in_MMX_IDGROUP_MMX_ID.IDX;
|
wire [SLV_BITS-1:0] slave_in_MMX_IDGROUP_MMX_ID.IDX;
|
wire [SLV_BITS-1:0] slave_out_MMX_IDGROUP_MMX_ID.IDX;
|
wire [SLV_BITS-1:0] slave_out_MMX_IDGROUP_MMX_ID.IDX;
|
wire slave_empty_MMX_IDGROUP_MMX_ID.IDX;
|
wire slave_empty_MMX_IDGROUP_MMX_ID.IDX;
|
wire slave_full_MMX_IDGROUP_MMX_ID.IDX;
|
wire slave_full_MMX_IDGROUP_MMX_ID.IDX;
|
|
|
| Line 78... |
Line 79... |
wire master_full_SSX;
|
wire master_full_SSX;
|
|
|
reg [SLV_BITS-1:0] MMX_WSLV;
|
reg [SLV_BITS-1:0] MMX_WSLV;
|
reg MMX_WOK;
|
reg MMX_WOK;
|
|
|
|
reg MMX_pending;
|
|
reg MMX_pending_d;
|
|
wire MMX_pending_rise;
|
|
|
|
|
|
|
assign AWmatch_MMX_IDGROUP_MMX_ID.IDX = MMX_AWID == ID_BITS'bADD_IDGROUP_MMX_ID;
|
assign AWmatch_MMX_IDGROUP_MMX_ID.IDX = MMX_AWID == ID_BITS'bADD_IDGROUP_MMX_ID;
|
|
|
assign Wmatch_MMX_IDGROUP_MMX_ID.IDX = MMX_WID == ID_BITS'bADD_IDGROUP_MMX_ID;
|
assign Wmatch_MMX_IDGROUP_MMX_ID.IDX = MMX_WID == ID_BITS'bADD_IDGROUP_MMX_ID;
|
|
|
|
|
assign cmd_push_MMX = MMX_AWVALID & MMX_AWREADY;
|
assign cmd_push_MMX = MMX_AWVALID & (MMX_pending ? MMX_pending_rise : MMX_AWREADY);
|
assign cmd_push_MMX_IDGROUP_MMX_ID.IDX = cmd_push_MMX & AWmatch_MMX_IDGROUP_MMX_ID.IDX;
|
assign cmd_push_MMX_IDGROUP_MMX_ID.IDX = cmd_push_MMX & AWmatch_MMX_IDGROUP_MMX_ID.IDX;
|
assign cmd_pop_MMX = MMX_WVALID & MMX_WREADY & MMX_WLAST;
|
assign cmd_pop_MMX = MMX_WVALID & MMX_WREADY & MMX_WLAST;
|
assign cmd_pop_MMX_IDGROUP_MMX_ID.IDX = cmd_pop_MMX & Wmatch_MMX_IDGROUP_MMX_ID.IDX;
|
assign cmd_pop_MMX_IDGROUP_MMX_ID.IDX = cmd_pop_MMX & Wmatch_MMX_IDGROUP_MMX_ID.IDX;
|
|
|
assign cmd_push_SSX = SSX_AWVALID & SSX_AWREADY;
|
assign cmd_push_SSX = SSX_AWVALID & SSX_AWREADY;
|
| Line 98... |
Line 102... |
assign master_in_SSX = SSX_AWMSTR;
|
assign master_in_SSX = SSX_AWMSTR;
|
|
|
assign slave_in_MMX_IDGROUP_MMX_ID.IDX = MMX_AWSLV;
|
assign slave_in_MMX_IDGROUP_MMX_ID.IDX = MMX_AWSLV;
|
|
|
|
|
|
assign MMX_pending_rise = MMX_pending & (~MMX_pending_d);
|
|
|
|
always @(posedge clk or posedge reset)
|
|
if (reset)
|
|
begin
|
|
MMX_pending <= #FFD 1'b0;
|
|
MMX_pending_d <= #FFD 1'b0;
|
|
end
|
|
else
|
|
begin
|
|
MMX_pending <= #FFD MMX_AWVALID & (~MMX_AWREADY);
|
|
MMX_pending_d <= #FFD MMX_pending;
|
|
end
|
|
|
|
|
LOOP MX
|
LOOP MX
|
always @(*)
|
always @(*)
|
begin
|
begin
|
case (MMX_WID)
|
case (MMX_WID)
|
ID_BITS'bADD_IDGROUP_MMX_ID : MMX_WSLV = slave_out_MMX_IDGROUP_MMX_ID.IDX;
|
ID_BITS'bADD_IDGROUP_MMX_ID : MMX_WSLV = slave_out_MMX_IDGROUP_MMX_ID.IDX;
|
| Line 110... |
Line 129... |
end
|
end
|
|
|
always @(*)
|
always @(*)
|
begin
|
begin
|
case (MMX_WSLV)
|
case (MMX_WSLV)
|
SLV_BITS'dSX : MMX_WOK = master_out_SSX == MSTR_BITS'dMX;
|
SLV_BITS'dSX : MMX_WOK = (master_out_SSX == MSTR_BITS'dMX) & (~slave_empty_MMX);
|
default : MMX_WOK = 1'b0;
|
default : MMX_WOK = 1'b0;
|
endcase
|
endcase
|
end
|
end
|
|
|
ENDLOOP MX
|
ENDLOOP MX
|
|
|
LOOP MX
|
LOOP MX
|
|
assign slave_empty_MMX = GONCAT(slave_empty_MMX_IDGROUP_MMX_ID.IDX &);
|
LOOP IX GROUP_MMX_ID.NUM
|
LOOP IX GROUP_MMX_ID.NUM
|
|
|
prgen_fifo #(SLV_BITS, CMD_DEPTH)
|
prgen_fifo #(SLV_BITS, CMD_DEPTH)
|
slave_fifo_MMX_IDIX(
|
slave_fifo_MMX_IDIX(
|
.clk(clk),
|
.clk(clk),
|
.reset(reset),
|
.reset(reset),
|
.push(cmd_push_MMX_IDIX),
|
.push(cmd_push_MMX_IDIX),
|
| Line 137... |
Line 158... |
ENDLOOP MX
|
ENDLOOP MX
|
|
|
|
|
|
|
LOOP SX
|
LOOP SX
|
prgen_fifo #(MSTR_BITS, 32) //TBD SLV_DEPTH
|
prgen_fifo #(MSTR_BITS, SLV_DEPTH)
|
master_fifo_SSX(
|
master_fifo_SSX(
|
.clk(clk),
|
.clk(clk),
|
.reset(reset),
|
.reset(reset),
|
.push(cmd_push_SSX),
|
.push(cmd_push_SSX),
|
.pop(cmd_pop_SSX),
|
.pop(cmd_pop_SSX),
|
