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Line 82... |
reg MMX_WOK;
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reg MMX_WOK;
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reg MMX_pending;
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reg MMX_pending;
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reg MMX_pending_d;
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reg MMX_pending_d;
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wire MMX_pending_rise;
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wire MMX_pending_rise;
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reg SSX_pending;
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reg SSX_pending_d;
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wire SSX_pending_rise;
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assign AWmatch_MMX_IDGROUP_MMX_ID.IDX = MMX_AWID == ID_BITS'bADD_IDGROUP_MMX_ID;
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assign AWmatch_MMX_IDGROUP_MMX_ID.IDX = MMX_AWID == ID_BITS'bADD_IDGROUP_MMX_ID;
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assign cmd_push_MMX = MMX_AWVALID & (MMX_pending ? MMX_pending_rise : MMX_AWREADY);
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assign cmd_push_MMX = MMX_AWVALID & (MMX_pending ? MMX_pending_rise : MMX_AWREADY);
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assign cmd_push_MMX_IDGROUP_MMX_ID.IDX = cmd_push_MMX & AWmatch_MMX_IDGROUP_MMX_ID.IDX;
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assign cmd_push_MMX_IDGROUP_MMX_ID.IDX = cmd_push_MMX & AWmatch_MMX_IDGROUP_MMX_ID.IDX;
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assign cmd_pop_MMX = MMX_WVALID & MMX_WREADY & MMX_WLAST;
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assign cmd_pop_MMX = MMX_WVALID & MMX_WREADY & MMX_WLAST;
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assign cmd_pop_MMX_IDGROUP_MMX_ID.IDX = cmd_pop_MMX & Wmatch_MMX_IDGROUP_MMX_ID.IDX;
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assign cmd_pop_MMX_IDGROUP_MMX_ID.IDX = cmd_pop_MMX & Wmatch_MMX_IDGROUP_MMX_ID.IDX;
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assign cmd_push_SSX = SSX_AWVALID & SSX_AWREADY;
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assign cmd_push_SSX = SSX_AWVALID & (SSX_pending ? SSX_pending_rise : SSX_AWREADY);
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assign cmd_pop_SSX = SSX_WVALID & SSX_WREADY & SSX_WLAST;
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assign cmd_pop_SSX = SSX_WVALID & SSX_WREADY & SSX_WLAST;
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assign master_in_SSX = SSX_AWMSTR;
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assign master_in_SSX = SSX_AWMSTR;
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assign slave_in_MMX_IDGROUP_MMX_ID.IDX = MMX_AWSLV;
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assign slave_in_MMX_IDGROUP_MMX_ID.IDX = MMX_AWSLV;
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assign MMX_pending_rise = MMX_pending & (~MMX_pending_d);
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assign MMX_pending_rise = MMX_pending & (~MMX_pending_d);
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assign SSX_pending_rise = SSX_pending & (~SSX_pending_d);
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always @(posedge clk or posedge reset)
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always @(posedge clk or posedge reset)
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if (reset)
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if (reset)
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begin
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begin
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MMX_pending <= #FFD 1'b0;
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MMX_pending <= #FFD 1'b0;
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MMX_pending_d <= #FFD 1'b0;
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MMX_pending_d <= #FFD 1'b0;
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SSX_pending <= #FFD 1'b0;
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SSX_pending_d <= #FFD 1'b0;
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end
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end
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else
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else
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begin
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begin
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MMX_pending <= #FFD MMX_AWVALID & (~MMX_AWREADY);
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MMX_pending <= #FFD MMX_AWVALID & (~MMX_AWREADY);
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MMX_pending_d <= #FFD MMX_pending;
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MMX_pending_d <= #FFD MMX_pending;
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SSX_pending <= #FFD SSX_AWVALID & (~SSX_AWREADY);
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SSX_pending_d <= #FFD SSX_pending;
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end
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end
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LOOP MX
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LOOP MX
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always @(*)
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always @(*)
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begin
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begin
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case (MMX_WID)
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case (MMX_WID)
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ID_BITS'bADD_IDGROUP_MMX_ID : MMX_WSLV = slave_out_MMX_IDGROUP_MMX_ID.IDX;
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ID_BITS'bADD_IDGROUP_MMX_ID : MMX_WSLV = slave_out_MMX_IDGROUP_MMX_ID.IDX;
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