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[/] [robust_reg/] [trunk/] [src/] [base/] [regfile.v] - Diff between revs 11 and 14
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Rev 14 |
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Line 28... |
/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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OUTFILE REGNAME_regfile.v
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OUTFILE REGNAME_regfile.v
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INCLUDE def_regfile.txt
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INCLUDE def_regfile.txt
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ITER RX REG_NUM
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ITER RX GROUP_REGS.NUM
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module REGNAME_regfile (PORTS);
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module REGNAME_regfile (PORTS);
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parameter ADDR_BITS = 16;
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parameter ADDR_BITS = 16;
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Line 76... |
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//---------------------- Write Operations ---------------------------
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//---------------------- Write Operations ---------------------------
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assign wr_regGROUP_REGS.SON(TYPE != TYPE_RO).IDX = gpwrite & (paddr == GROUP_REGS);
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assign wr_regGROUP_REGS.SON(TYPE != TYPE_RO).IDX = gpwrite & (paddr == GROUP_REGS);
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LOOP RX REG_NUM
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LOOP RX GROUP_REGS.NUM
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IFDEF TRUE(GROUP_REGS[RX].TYPE == TYPE_RW)
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IFDEF TRUE(GROUP_REGS[RX].TYPE == TYPE_RW)
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//GROUP_REGS[RX].DESC
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//GROUP_REGS[RX].DESC
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always @(posedge clk or posedge reset)
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always @(posedge clk or posedge reset)
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if (reset)
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if (reset)
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begin
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begin
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